ulcb.dtsi (d149d6ae17197ce23e2cd6bc5fcdacf7b593e55e) ulcb.dtsi (7da2ed12da2c81b782ee4c3b4b0b87098048aae8)
1/*
2 * Device Tree Source for the R-Car Gen3 ULCB board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any

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29 * This is same as <&rcar_sound 0>
30 * but needed to avoid cs2000/rcar_sound probe dead-lock
31 */
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <11289600>;
35 };
36
1/*
2 * Device Tree Source for the R-Car Gen3 ULCB board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any

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29 * This is same as <&rcar_sound 0>
30 * but needed to avoid cs2000/rcar_sound probe dead-lock
31 */
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <11289600>;
35 };
36
37 hdmi0-out {
38 compatible = "hdmi-connector";
39 type = "a";
40
41 port {
42 hdmi0_con: endpoint {
43 };
44 };
45 };
46
37 keyboard {
38 compatible = "gpio-keys";
39
40 key-1 {
41 linux,code = <KEY_1>;
42 label = "SW3";
43 wakeup-source;
44 debounce-interval = <20>;

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115 1800000 0>;
116 };
117
118 x12_clk: x12 {
119 compatible = "fixed-clock";
120 #clock-cells = <0>;
121 clock-frequency = <24576000>;
122 };
47 keyboard {
48 compatible = "gpio-keys";
49
50 key-1 {
51 linux,code = <KEY_1>;
52 label = "SW3";
53 wakeup-source;
54 debounce-interval = <20>;

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125 1800000 0>;
126 };
127
128 x12_clk: x12 {
129 compatible = "fixed-clock";
130 #clock-cells = <0>;
131 clock-frequency = <24576000>;
132 };
133
134 x23_clk: x23-clock {
135 compatible = "fixed-clock";
136 #clock-cells = <0>;
137 clock-frequency = <25000000>;
138 };
123};
124
125&audio_clk_a {
126 clock-frequency = <22579200>;
127};
128
129&avb {
130 pinctrl-0 = <&avb_pins>;

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136 phy0: ethernet-phy@0 {
137 rxc-skew-ps = <1500>;
138 reg = <0>;
139 interrupt-parent = <&gpio2>;
140 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
141 };
142};
143
139};
140
141&audio_clk_a {
142 clock-frequency = <22579200>;
143};
144
145&avb {
146 pinctrl-0 = <&avb_pins>;

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152 phy0: ethernet-phy@0 {
153 rxc-skew-ps = <1500>;
154 reg = <0>;
155 interrupt-parent = <&gpio2>;
156 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
157 };
158};
159
160&du {
161 status = "okay";
162};
163
144&ehci1 {
145 status = "okay";
146};
147
148&extal_clk {
149 clock-frequency = <16666666>;
150};
151
152&extalr_clk {
153 clock-frequency = <32768>;
154};
155
164&ehci1 {
165 status = "okay";
166};
167
168&extal_clk {
169 clock-frequency = <16666666>;
170};
171
172&extalr_clk {
173 clock-frequency = <32768>;
174};
175
176&hdmi0 {
177 status = "okay";
178
179 ports {
180 port@1 {
181 reg = <1>;
182 rcar_dw_hdmi0_out: endpoint {
183 remote-endpoint = <&hdmi0_con>;
184 };
185 };
186 };
187};
188
189&hdmi0_con {
190 remote-endpoint = <&rcar_dw_hdmi0_out>;
191};
192
156&i2c2 {
157 pinctrl-0 = <&i2c2_pins>;
158 pinctrl-names = "default";
159
160 status = "okay";
161
162 clock-frequency = <100000>;
163

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184 clocks = <&audio_clkout>, <&x12_clk>;
185 clock-names = "clk_in", "ref_clk";
186
187 assigned-clocks = <&cs2000>;
188 assigned-clock-rates = <24576000>; /* 1/1 divide */
189 };
190};
191
193&i2c2 {
194 pinctrl-0 = <&i2c2_pins>;
195 pinctrl-names = "default";
196
197 status = "okay";
198
199 clock-frequency = <100000>;
200

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221 clocks = <&audio_clkout>, <&x12_clk>;
222 clock-names = "clk_in", "ref_clk";
223
224 assigned-clocks = <&cs2000>;
225 assigned-clock-rates = <24576000>; /* 1/1 divide */
226 };
227};
228
229&i2c4 {
230 status = "okay";
231
232 clock-frequency = <400000>;
233
234 versaclock5: clock-generator@6a {
235 compatible = "idt,5p49v5925";
236 reg = <0x6a>;
237 #clock-cells = <1>;
238 clocks = <&x23_clk>;
239 clock-names = "xin";
240 };
241};
242
243&i2c_dvfs {
244 status = "okay";
245};
246
192&ohci1 {
193 status = "okay";
194};
195
196&pfc {
197 pinctrl-0 = <&scif_clk_pins>;
198 pinctrl-names = "default";
199

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247&ohci1 {
248 status = "okay";
249};
250
251&pfc {
252 pinctrl-0 = <&scif_clk_pins>;
253 pinctrl-names = "default";
254

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