1/* 2 * Device Tree Source for the R-Car Gen3 ULCB board 3 * 4 * Copyright (C) 2016 Renesas Electronics Corp. 5 * Copyright (C) 2016 Cogent Embedded, Inc. 6 * 7 * This file is licensed under the terms of the GNU General Public License 8 * version 2. This program is licensed "as is" without any warranty of any 9 * kind, whether express or implied. 10 */ 11 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/input/input.h> 14 15/ { 16 model = "Renesas R-Car Gen3 ULCB board"; 17 18 aliases { 19 serial0 = &scif2; 20 ethernet0 = &avb; 21 }; 22 23 chosen { 24 stdout-path = "serial0:115200n8"; 25 }; 26 27 audio_clkout: audio-clkout { 28 /* 29 * This is same as <&rcar_sound 0> 30 * but needed to avoid cs2000/rcar_sound probe dead-lock 31 */ 32 compatible = "fixed-clock"; 33 #clock-cells = <0>; 34 clock-frequency = <11289600>; 35 }; 36 37 keyboard { 38 compatible = "gpio-keys"; 39 40 key-1 { 41 linux,code = <KEY_1>; 42 label = "SW3"; 43 wakeup-source; 44 debounce-interval = <20>; 45 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; 46 }; 47 }; 48 49 leds { 50 compatible = "gpio-leds"; 51 52 led5 { 53 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; 54 }; 55 led6 { 56 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; 57 }; 58 }; 59 60 reg_1p8v: regulator0 { 61 compatible = "regulator-fixed"; 62 regulator-name = "fixed-1.8V"; 63 regulator-min-microvolt = <1800000>; 64 regulator-max-microvolt = <1800000>; 65 regulator-boot-on; 66 regulator-always-on; 67 }; 68 69 reg_3p3v: regulator1 { 70 compatible = "regulator-fixed"; 71 regulator-name = "fixed-3.3V"; 72 regulator-min-microvolt = <3300000>; 73 regulator-max-microvolt = <3300000>; 74 regulator-boot-on; 75 regulator-always-on; 76 }; 77 78 rsnd_ak4613: sound { 79 compatible = "simple-audio-card"; 80 81 simple-audio-card,format = "left_j"; 82 simple-audio-card,bitclock-master = <&sndcpu>; 83 simple-audio-card,frame-master = <&sndcpu>; 84 85 sndcpu: simple-audio-card,cpu { 86 sound-dai = <&rcar_sound>; 87 }; 88 89 sndcodec: simple-audio-card,codec { 90 sound-dai = <&ak4613>; 91 }; 92 }; 93 94 vcc_sdhi0: regulator-vcc-sdhi0 { 95 compatible = "regulator-fixed"; 96 97 regulator-name = "SDHI0 Vcc"; 98 regulator-min-microvolt = <3300000>; 99 regulator-max-microvolt = <3300000>; 100 101 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; 102 enable-active-high; 103 }; 104 105 vccq_sdhi0: regulator-vccq-sdhi0 { 106 compatible = "regulator-gpio"; 107 108 regulator-name = "SDHI0 VccQ"; 109 regulator-min-microvolt = <1800000>; 110 regulator-max-microvolt = <3300000>; 111 112 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 113 gpios-states = <1>; 114 states = <3300000 1 115 1800000 0>; 116 }; 117 118 x12_clk: x12 { 119 compatible = "fixed-clock"; 120 #clock-cells = <0>; 121 clock-frequency = <24576000>; 122 }; 123}; 124 125&audio_clk_a { 126 clock-frequency = <22579200>; 127}; 128 129&avb { 130 pinctrl-0 = <&avb_pins>; 131 pinctrl-names = "default"; 132 renesas,no-ether-link; 133 phy-handle = <&phy0>; 134 status = "okay"; 135 136 phy0: ethernet-phy@0 { 137 rxc-skew-ps = <1500>; 138 reg = <0>; 139 interrupt-parent = <&gpio2>; 140 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 141 }; 142}; 143 144&ehci1 { 145 status = "okay"; 146}; 147 148&extal_clk { 149 clock-frequency = <16666666>; 150}; 151 152&extalr_clk { 153 clock-frequency = <32768>; 154}; 155 156&i2c2 { 157 pinctrl-0 = <&i2c2_pins>; 158 pinctrl-names = "default"; 159 160 status = "okay"; 161 162 clock-frequency = <100000>; 163 164 ak4613: codec@10 { 165 compatible = "asahi-kasei,ak4613"; 166 #sound-dai-cells = <0>; 167 reg = <0x10>; 168 clocks = <&rcar_sound 3>; 169 170 asahi-kasei,in1-single-end; 171 asahi-kasei,in2-single-end; 172 asahi-kasei,out1-single-end; 173 asahi-kasei,out2-single-end; 174 asahi-kasei,out3-single-end; 175 asahi-kasei,out4-single-end; 176 asahi-kasei,out5-single-end; 177 asahi-kasei,out6-single-end; 178 }; 179 180 cs2000: clk-multiplier@4f { 181 #clock-cells = <0>; 182 compatible = "cirrus,cs2000-cp"; 183 reg = <0x4f>; 184 clocks = <&audio_clkout>, <&x12_clk>; 185 clock-names = "clk_in", "ref_clk"; 186 187 assigned-clocks = <&cs2000>; 188 assigned-clock-rates = <24576000>; /* 1/1 divide */ 189 }; 190}; 191 192&ohci1 { 193 status = "okay"; 194}; 195 196&pfc { 197 pinctrl-0 = <&scif_clk_pins>; 198 pinctrl-names = "default"; 199 200 avb_pins: avb { 201 mux { 202 groups = "avb_link", "avb_phy_int", "avb_mdc", 203 "avb_mii"; 204 function = "avb"; 205 }; 206 207 pins_mdc { 208 groups = "avb_mdc"; 209 drive-strength = <24>; 210 }; 211 212 pins_mii_tx { 213 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", 214 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; 215 drive-strength = <12>; 216 }; 217 }; 218 219 i2c2_pins: i2c2 { 220 groups = "i2c2_a"; 221 function = "i2c2"; 222 }; 223 224 scif2_pins: scif2 { 225 groups = "scif2_data_a"; 226 function = "scif2"; 227 }; 228 229 scif_clk_pins: scif_clk { 230 groups = "scif_clk_a"; 231 function = "scif_clk"; 232 }; 233 234 sdhi0_pins: sd0 { 235 groups = "sdhi0_data4", "sdhi0_ctrl"; 236 function = "sdhi0"; 237 power-source = <3300>; 238 }; 239 240 sdhi0_pins_uhs: sd0_uhs { 241 groups = "sdhi0_data4", "sdhi0_ctrl"; 242 function = "sdhi0"; 243 power-source = <1800>; 244 }; 245 246 sdhi2_pins: sd2 { 247 groups = "sdhi2_data8", "sdhi2_ctrl"; 248 function = "sdhi2"; 249 power-source = <3300>; 250 }; 251 252 sdhi2_pins_uhs: sd2_uhs { 253 groups = "sdhi2_data8", "sdhi2_ctrl"; 254 function = "sdhi2"; 255 power-source = <1800>; 256 }; 257 258 sound_pins: sound { 259 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; 260 function = "ssi"; 261 }; 262 263 sound_clk_pins: sound-clk { 264 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", 265 "audio_clkout_a", "audio_clkout3_a"; 266 function = "audio_clk"; 267 }; 268 269 usb1_pins: usb1 { 270 groups = "usb1"; 271 function = "usb1"; 272 }; 273}; 274 275&rcar_sound { 276 pinctrl-0 = <&sound_pins &sound_clk_pins>; 277 pinctrl-names = "default"; 278 279 /* Single DAI */ 280 #sound-dai-cells = <0>; 281 282 /* audio_clkout0/1/2/3 */ 283 #clock-cells = <1>; 284 clock-frequency = <12288000 11289600>; 285 286 status = "okay"; 287 288 /* update <audio_clk_b> to <cs2000> */ 289 clocks = <&cpg CPG_MOD 1005>, 290 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 291 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 292 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 293 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 294 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 295 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 296 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 297 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 298 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 299 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 300 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 301 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 302 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 303 <&audio_clk_a>, <&cs2000>, 304 <&audio_clk_c>, 305 <&cpg CPG_CORE CPG_AUDIO_CLK_I>; 306 307 rcar_sound,dai { 308 dai0 { 309 playback = <&ssi0 &src0 &dvc0>; 310 capture = <&ssi1 &src1 &dvc1>; 311 }; 312 }; 313}; 314 315&scif2 { 316 pinctrl-0 = <&scif2_pins>; 317 pinctrl-names = "default"; 318 319 status = "okay"; 320}; 321 322&scif_clk { 323 clock-frequency = <14745600>; 324}; 325 326&sdhi0 { 327 pinctrl-0 = <&sdhi0_pins>; 328 pinctrl-1 = <&sdhi0_pins_uhs>; 329 pinctrl-names = "default", "state_uhs"; 330 331 vmmc-supply = <&vcc_sdhi0>; 332 vqmmc-supply = <&vccq_sdhi0>; 333 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 334 bus-width = <4>; 335 sd-uhs-sdr50; 336 status = "okay"; 337}; 338 339&sdhi2 { 340 /* used for on-board 8bit eMMC */ 341 pinctrl-0 = <&sdhi2_pins>; 342 pinctrl-1 = <&sdhi2_pins_uhs>; 343 pinctrl-names = "default", "state_uhs"; 344 345 vmmc-supply = <®_3p3v>; 346 vqmmc-supply = <®_1p8v>; 347 bus-width = <8>; 348 mmc-hs200-1_8v; 349 non-removable; 350 status = "okay"; 351}; 352 353&ssi1 { 354 shared-pin; 355}; 356 357&usb2_phy1 { 358 pinctrl-0 = <&usb1_pins>; 359 pinctrl-names = "default"; 360 361 status = "okay"; 362}; 363 364&wdt0 { 365 timeout-sec = <60>; 366 status = "okay"; 367}; 368