r9a07g043.dtsi (e6a9acc370c6cb9e6ff6225b034a7a4374df0134) r9a07g043.dtsi (91e548da2cb1b180a1ab1059a1c89d7532135da7)
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/G2UL SoC
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/arm-gic.h>

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481 status = "disabled";
482 };
483
484 adc: adc@10059000 {
485 reg = <0 0x10059000 0 0x400>;
486 /* place holder */
487 };
488
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/G2UL SoC
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/arm-gic.h>

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481 status = "disabled";
482 };
483
484 adc: adc@10059000 {
485 reg = <0 0x10059000 0 0x400>;
486 /* place holder */
487 };
488
489 tsu: thermal@10059400 {
490 compatible = "renesas,r9a07g043-tsu",
491 "renesas,rzg2l-tsu";
492 reg = <0 0x10059400 0 0x400>;
493 clocks = <&cpg CPG_MOD R9A07G043_TSU_PCLK>;
494 resets = <&cpg R9A07G043_TSU_PRESETN>;
495 power-domains = <&cpg>;
496 #thermal-sensor-cells = <1>;
497 };
498
489 sbc: spi@10060000 {
490 reg = <0 0x10060000 0 0x10000>,
491 <0 0x20000000 0 0x10000000>,
492 <0 0x10070000 0 0x10000>;
493 #address-cells = <1>;
494 #size-cells = <0>;
495 /* place holder */
496 };

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821 interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
822 clocks = <&cpg CPG_MOD R9A07G043_OSTM2_PCLK>;
823 resets = <&cpg R9A07G043_OSTM2_PRESETZ>;
824 power-domains = <&cpg>;
825 status = "disabled";
826 };
827 };
828
499 sbc: spi@10060000 {
500 reg = <0 0x10060000 0 0x10000>,
501 <0 0x20000000 0 0x10000000>,
502 <0 0x10070000 0 0x10000>;
503 #address-cells = <1>;
504 #size-cells = <0>;
505 /* place holder */
506 };

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831 interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
832 clocks = <&cpg CPG_MOD R9A07G043_OSTM2_PCLK>;
833 resets = <&cpg R9A07G043_OSTM2_PRESETZ>;
834 power-domains = <&cpg>;
835 status = "disabled";
836 };
837 };
838
839 thermal-zones {
840 cpu-thermal {
841 polling-delay-passive = <250>;
842 polling-delay = <1000>;
843 thermal-sensors = <&tsu 0>;
844
845 trips {
846 sensor_crit: sensor-crit {
847 temperature = <125000>;
848 hysteresis = <1000>;
849 type = "critical";
850 };
851 };
852 };
853 };
854
829 timer {
830 compatible = "arm,armv8-timer";
831 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
832 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
833 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
834 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
835 };
836};
855 timer {
856 compatible = "arm,armv8-timer";
857 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
858 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
859 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
860 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
861 };
862};