r9a07g043.dtsi (50501936288d6a29d7ef78f25d00e33240fad45f) r9a07g043.dtsi (a4c125a8a35113f53f5085b376cb9a9763fb9129)
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/Five and RZ/G2UL SoCs
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r9a07g043-cpg.h>

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69 };
70
71 soc: soc {
72 compatible = "simple-bus";
73 #address-cells = <2>;
74 #size-cells = <2>;
75 ranges;
76
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/Five and RZ/G2UL SoCs
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r9a07g043-cpg.h>

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69 };
70
71 soc: soc {
72 compatible = "simple-bus";
73 #address-cells = <2>;
74 #size-cells = <2>;
75 ranges;
76
77 mtu3: timer@10001200 {
78 compatible = "renesas,r9a07g043-mtu3",
79 "renesas,rz-mtu3";
80 reg = <0 0x10001200 0 0xb00>;
81 interrupts = <SOC_PERIPHERAL_IRQ(170) IRQ_TYPE_EDGE_RISING>,
82 <SOC_PERIPHERAL_IRQ(171) IRQ_TYPE_EDGE_RISING>,
83 <SOC_PERIPHERAL_IRQ(172) IRQ_TYPE_EDGE_RISING>,
84 <SOC_PERIPHERAL_IRQ(173) IRQ_TYPE_EDGE_RISING>,
85 <SOC_PERIPHERAL_IRQ(174) IRQ_TYPE_EDGE_RISING>,
86 <SOC_PERIPHERAL_IRQ(175) IRQ_TYPE_EDGE_RISING>,
87 <SOC_PERIPHERAL_IRQ(176) IRQ_TYPE_EDGE_RISING>,
88 <SOC_PERIPHERAL_IRQ(177) IRQ_TYPE_EDGE_RISING>,
89 <SOC_PERIPHERAL_IRQ(178) IRQ_TYPE_EDGE_RISING>,
90 <SOC_PERIPHERAL_IRQ(179) IRQ_TYPE_EDGE_RISING>,
91 <SOC_PERIPHERAL_IRQ(180) IRQ_TYPE_EDGE_RISING>,
92 <SOC_PERIPHERAL_IRQ(181) IRQ_TYPE_EDGE_RISING>,
93 <SOC_PERIPHERAL_IRQ(182) IRQ_TYPE_EDGE_RISING>,
94 <SOC_PERIPHERAL_IRQ(183) IRQ_TYPE_EDGE_RISING>,
95 <SOC_PERIPHERAL_IRQ(184) IRQ_TYPE_EDGE_RISING>,
96 <SOC_PERIPHERAL_IRQ(185) IRQ_TYPE_EDGE_RISING>,
97 <SOC_PERIPHERAL_IRQ(186) IRQ_TYPE_EDGE_RISING>,
98 <SOC_PERIPHERAL_IRQ(187) IRQ_TYPE_EDGE_RISING>,
99 <SOC_PERIPHERAL_IRQ(188) IRQ_TYPE_EDGE_RISING>,
100 <SOC_PERIPHERAL_IRQ(189) IRQ_TYPE_EDGE_RISING>,
101 <SOC_PERIPHERAL_IRQ(190) IRQ_TYPE_EDGE_RISING>,
102 <SOC_PERIPHERAL_IRQ(191) IRQ_TYPE_EDGE_RISING>,
103 <SOC_PERIPHERAL_IRQ(192) IRQ_TYPE_EDGE_RISING>,
104 <SOC_PERIPHERAL_IRQ(193) IRQ_TYPE_EDGE_RISING>,
105 <SOC_PERIPHERAL_IRQ(194) IRQ_TYPE_EDGE_RISING>,
106 <SOC_PERIPHERAL_IRQ(195) IRQ_TYPE_EDGE_RISING>,
107 <SOC_PERIPHERAL_IRQ(196) IRQ_TYPE_EDGE_RISING>,
108 <SOC_PERIPHERAL_IRQ(197) IRQ_TYPE_EDGE_RISING>,
109 <SOC_PERIPHERAL_IRQ(198) IRQ_TYPE_EDGE_RISING>,
110 <SOC_PERIPHERAL_IRQ(199) IRQ_TYPE_EDGE_RISING>,
111 <SOC_PERIPHERAL_IRQ(200) IRQ_TYPE_EDGE_RISING>,
112 <SOC_PERIPHERAL_IRQ(201) IRQ_TYPE_EDGE_RISING>,
113 <SOC_PERIPHERAL_IRQ(202) IRQ_TYPE_EDGE_RISING>,
114 <SOC_PERIPHERAL_IRQ(203) IRQ_TYPE_EDGE_RISING>,
115 <SOC_PERIPHERAL_IRQ(204) IRQ_TYPE_EDGE_RISING>,
116 <SOC_PERIPHERAL_IRQ(205) IRQ_TYPE_EDGE_RISING>,
117 <SOC_PERIPHERAL_IRQ(206) IRQ_TYPE_EDGE_RISING>,
118 <SOC_PERIPHERAL_IRQ(207) IRQ_TYPE_EDGE_RISING>,
119 <SOC_PERIPHERAL_IRQ(208) IRQ_TYPE_EDGE_RISING>,
120 <SOC_PERIPHERAL_IRQ(209) IRQ_TYPE_EDGE_RISING>,
121 <SOC_PERIPHERAL_IRQ(210) IRQ_TYPE_EDGE_RISING>,
122 <SOC_PERIPHERAL_IRQ(211) IRQ_TYPE_EDGE_RISING>,
123 <SOC_PERIPHERAL_IRQ(212) IRQ_TYPE_EDGE_RISING>,
124 <SOC_PERIPHERAL_IRQ(213) IRQ_TYPE_EDGE_RISING>;
125 interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
126 "tciv0", "tgie0", "tgif0",
127 "tgia1", "tgib1", "tciv1", "tciu1",
128 "tgia2", "tgib2", "tciv2", "tciu2",
129 "tgia3", "tgib3", "tgic3", "tgid3",
130 "tciv3",
131 "tgia4", "tgib4", "tgic4", "tgid4",
132 "tciv4",
133 "tgiu5", "tgiv5", "tgiw5",
134 "tgia6", "tgib6", "tgic6", "tgid6",
135 "tciv6",
136 "tgia7", "tgib7", "tgic7", "tgid7",
137 "tciv7",
138 "tgia8", "tgib8", "tgic8", "tgid8",
139 "tciv8", "tciu8";
140 clocks = <&cpg CPG_MOD R9A07G043_MTU_X_MCK_MTU3>;
141 power-domains = <&cpg>;
142 resets = <&cpg R9A07G043_MTU_X_PRESET_MTU3>;
143 #pwm-cells = <2>;
144 status = "disabled";
145 };
146
77 ssi0: ssi@10049c00 {
78 compatible = "renesas,r9a07g043-ssi",
79 "renesas,rz-ssi";
80 reg = <0 0x10049c00 0 0x400>;
81 interrupts = <SOC_PERIPHERAL_IRQ(326) IRQ_TYPE_LEVEL_HIGH>,
82 <SOC_PERIPHERAL_IRQ(327) IRQ_TYPE_EDGE_RISING>,
83 <SOC_PERIPHERAL_IRQ(328) IRQ_TYPE_EDGE_RISING>;
84 interrupt-names = "int_req", "dma_rx", "dma_tx";

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147 ssi0: ssi@10049c00 {
148 compatible = "renesas,r9a07g043-ssi",
149 "renesas,rz-ssi";
150 reg = <0 0x10049c00 0 0x400>;
151 interrupts = <SOC_PERIPHERAL_IRQ(326) IRQ_TYPE_LEVEL_HIGH>,
152 <SOC_PERIPHERAL_IRQ(327) IRQ_TYPE_EDGE_RISING>,
153 <SOC_PERIPHERAL_IRQ(328) IRQ_TYPE_EDGE_RISING>;
154 interrupt-names = "int_req", "dma_rx", "dma_tx";

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