r8a77995.dtsi (2bc0aa18ee9f34613876f6ac7bf944ad65d63e17) r8a77995.dtsi (f191fba76916dc18c41cf6183d71dbf9a1d821c8)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2017 Glider bvba
7 */
8

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1233 clock-names = "core", "clkh";
1234 max-frequency = <200000000>;
1235 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1236 resets = <&cpg 312>;
1237 iommus = <&ipmmu_ds1 34>;
1238 status = "disabled";
1239 };
1240
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2017 Glider bvba
7 */
8

--- 1224 unchanged lines hidden (view full) ---

1233 clock-names = "core", "clkh";
1234 max-frequency = <200000000>;
1235 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1236 resets = <&cpg 312>;
1237 iommus = <&ipmmu_ds1 34>;
1238 status = "disabled";
1239 };
1240
1241 rpc: spi@ee200000 {
1242 compatible = "renesas,r8a77995-rpc-if",
1243 "renesas,rcar-gen3-rpc-if";
1244 reg = <0 0xee200000 0 0x200>,
1245 <0 0x08000000 0 0x04000000>,
1246 <0 0xee208000 0 0x100>;
1247 reg-names = "regs", "dirmap", "wbuf";
1248 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1249 clocks = <&cpg CPG_MOD 917>;
1250 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1251 resets = <&cpg 917>;
1252 #address-cells = <1>;
1253 #size-cells = <0>;
1254 status = "disabled";
1255 };
1256
1241 gic: interrupt-controller@f1010000 {
1242 compatible = "arm,gic-400";
1243 #interrupt-cells = <3>;
1244 #address-cells = <0>;
1245 interrupt-controller;
1246 reg = <0x0 0xf1010000 0 0x1000>,
1247 <0x0 0xf1020000 0 0x20000>,
1248 <0x0 0xf1040000 0 0x20000>,

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1257 gic: interrupt-controller@f1010000 {
1258 compatible = "arm,gic-400";
1259 #interrupt-cells = <3>;
1260 #address-cells = <0>;
1261 interrupt-controller;
1262 reg = <0x0 0xf1010000 0 0x1000>,
1263 <0x0 0xf1020000 0 0x20000>,
1264 <0x0 0xf1040000 0 0x20000>,

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