r8a77990.dtsi (bc011dfa30652380bf432fd52441077b52b4eadc) r8a77990.dtsi (3943e8967ad2e00fae114a334f88d5b366c6f809)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

--- 327 unchanged lines hidden (view full) ---

336 };
337
338 sysc: system-controller@e6180000 {
339 compatible = "renesas,r8a77990-sysc";
340 reg = <0 0xe6180000 0 0x0400>;
341 #power-domain-cells = <1>;
342 };
343
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

--- 327 unchanged lines hidden (view full) ---

336 };
337
338 sysc: system-controller@e6180000 {
339 compatible = "renesas,r8a77990-sysc";
340 reg = <0 0xe6180000 0 0x0400>;
341 #power-domain-cells = <1>;
342 };
343
344 dmac0: dma-controller@e6700000 {
345 compatible = "renesas,dmac-r8a77990",
346 "renesas,rcar-dmac";
347 reg = <0 0xe6700000 0 0x10000>;
348 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
349 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
350 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
351 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
352 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
353 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
354 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
355 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
356 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
357 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
360 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
361 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
362 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
363 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
364 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
365 interrupt-names = "error",
366 "ch0", "ch1", "ch2", "ch3",
367 "ch4", "ch5", "ch6", "ch7",
368 "ch8", "ch9", "ch10", "ch11",
369 "ch12", "ch13", "ch14", "ch15";
370 clocks = <&cpg CPG_MOD 219>;
371 clock-names = "fck";
372 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
373 resets = <&cpg 219>;
374 #dma-cells = <1>;
375 dma-channels = <16>;
376 };
377
378 dmac1: dma-controller@e7300000 {
379 compatible = "renesas,dmac-r8a77990",
380 "renesas,rcar-dmac";
381 reg = <0 0xe7300000 0 0x10000>;
382 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
383 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
384 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
385 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
386 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
387 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
388 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
389 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
390 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
393 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
394 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
395 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
396 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
397 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
398 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
399 interrupt-names = "error",
400 "ch0", "ch1", "ch2", "ch3",
401 "ch4", "ch5", "ch6", "ch7",
402 "ch8", "ch9", "ch10", "ch11",
403 "ch12", "ch13", "ch14", "ch15";
404 clocks = <&cpg CPG_MOD 218>;
405 clock-names = "fck";
406 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
407 resets = <&cpg 218>;
408 #dma-cells = <1>;
409 dma-channels = <16>;
410 };
411
412 dmac2: dma-controller@e7310000 {
413 compatible = "renesas,dmac-r8a77990",
414 "renesas,rcar-dmac";
415 reg = <0 0xe7310000 0 0x10000>;
416 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
417 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
418 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
419 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
420 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
421 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
422 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
423 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
424 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
425 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
426 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
427 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
428 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
429 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
430 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
431 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
432 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
433 interrupt-names = "error",
434 "ch0", "ch1", "ch2", "ch3",
435 "ch4", "ch5", "ch6", "ch7",
436 "ch8", "ch9", "ch10", "ch11",
437 "ch12", "ch13", "ch14", "ch15";
438 clocks = <&cpg CPG_MOD 217>;
439 clock-names = "fck";
440 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
441 resets = <&cpg 217>;
442 #dma-cells = <1>;
443 dma-channels = <16>;
444 };
445
344 ipmmu_ds0: mmu@e6740000 {
345 compatible = "renesas,ipmmu-r8a77990";
346 reg = <0 0xe6740000 0 0x1000>;
347 renesas,ipmmu-main = <&ipmmu_mm 0>;
348 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
349 #iommu-cells = <1>;
350 };
351

--- 413 unchanged lines hidden --- 		446 ipmmu_ds0: mmu@e6740000 {
447 compatible = "renesas,ipmmu-r8a77990";
448 reg = <0 0xe6740000 0 0x1000>;
449 renesas,ipmmu-main = <&ipmmu_mm 0>;
450 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
451 #iommu-cells = <1>;
452 };
453

--- 413 unchanged lines hidden ---