r8a77990.dtsi (2bc0b8e2461f525d447f05df8332d91d8f322081) r8a77990.dtsi (55697cbb44e4f7ea8369f19fa95115dbf066708c)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Device Tree Source for the r8a77990 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/renesas-cpg-mssr.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Device Tree Source for the r8a77990 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/renesas-cpg-mssr.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/power/r8a77990-sysc.h>
10
11/ {
12 compatible = "renesas,r8a77990";
13 #address-cells = <2>;
14 #size-cells = <2>;
15
16 cpus {
17 #address-cells = <1>;

--- 187 unchanged lines hidden (view full) ---

205 };
206
207 sysc: system-controller@e6180000 {
208 compatible = "renesas,r8a77990-sysc";
209 reg = <0 0xe6180000 0 0x0400>;
210 #power-domain-cells = <1>;
211 };
212
11
12/ {
13 compatible = "renesas,r8a77990";
14 #address-cells = <2>;
15 #size-cells = <2>;
16
17 cpus {
18 #address-cells = <1>;

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206 };
207
208 sysc: system-controller@e6180000 {
209 compatible = "renesas,r8a77990-sysc";
210 reg = <0 0xe6180000 0 0x0400>;
211 #power-domain-cells = <1>;
212 };
213
214 ipmmu_ds0: mmu@e6740000 {
215 compatible = "renesas,ipmmu-r8a77990";
216 reg = <0 0xe6740000 0 0x1000>;
217 renesas,ipmmu-main = <&ipmmu_mm 0>;
218 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
219 #iommu-cells = <1>;
220 };
221
222 ipmmu_ds1: mmu@e7740000 {
223 compatible = "renesas,ipmmu-r8a77990";
224 reg = <0 0xe7740000 0 0x1000>;
225 renesas,ipmmu-main = <&ipmmu_mm 1>;
226 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
227 #iommu-cells = <1>;
228 };
229
230 ipmmu_hc: mmu@e6570000 {
231 compatible = "renesas,ipmmu-r8a77990";
232 reg = <0 0xe6570000 0 0x1000>;
233 renesas,ipmmu-main = <&ipmmu_mm 2>;
234 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
235 #iommu-cells = <1>;
236 };
237
238 ipmmu_mm: mmu@e67b0000 {
239 compatible = "renesas,ipmmu-r8a77990";
240 reg = <0 0xe67b0000 0 0x1000>;
241 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
242 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
243 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
244 #iommu-cells = <1>;
245 };
246
247 ipmmu_mp: mmu@ec670000 {
248 compatible = "renesas,ipmmu-r8a77990";
249 reg = <0 0xec670000 0 0x1000>;
250 renesas,ipmmu-main = <&ipmmu_mm 4>;
251 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
252 #iommu-cells = <1>;
253 };
254
255 ipmmu_pv0: mmu@fd800000 {
256 compatible = "renesas,ipmmu-r8a77990";
257 reg = <0 0xfd800000 0 0x1000>;
258 renesas,ipmmu-main = <&ipmmu_mm 6>;
259 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
260 #iommu-cells = <1>;
261 };
262
263 ipmmu_rt: mmu@ffc80000 {
264 compatible = "renesas,ipmmu-r8a77990";
265 reg = <0 0xffc80000 0 0x1000>;
266 renesas,ipmmu-main = <&ipmmu_mm 10>;
267 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
268 #iommu-cells = <1>;
269 };
270
271 ipmmu_vc0: mmu@fe6b0000 {
272 compatible = "renesas,ipmmu-r8a77990";
273 reg = <0 0xfe6b0000 0 0x1000>;
274 renesas,ipmmu-main = <&ipmmu_mm 12>;
275 power-domains = <&sysc R8A77990_PD_A3VC>;
276 #iommu-cells = <1>;
277 };
278
279 ipmmu_vi0: mmu@febd0000 {
280 compatible = "renesas,ipmmu-r8a77990";
281 reg = <0 0xfebd0000 0 0x1000>;
282 renesas,ipmmu-main = <&ipmmu_mm 14>;
283 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
284 #iommu-cells = <1>;
285 };
286
287 ipmmu_vp0: mmu@fe990000 {
288 compatible = "renesas,ipmmu-r8a77990";
289 reg = <0 0xfe990000 0 0x1000>;
290 renesas,ipmmu-main = <&ipmmu_mm 16>;
291 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
292 #iommu-cells = <1>;
293 };
294
213 avb: ethernet@e6800000 {
214 compatible = "renesas,etheravb-r8a77990",
215 "renesas,etheravb-rcar-gen3";
295 avb: ethernet@e6800000 {
296 compatible = "renesas,etheravb-r8a77990",
297 "renesas,etheravb-rcar-gen3";
216 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
298 reg = <0 0xe6800000 0 0x800>;
217 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
218 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
219 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
220 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
221 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
222 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
223 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,

--- 113 unchanged lines hidden --- 		299 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
300 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
301 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
302 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
303 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
304 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
305 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
306 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,

--- 113 unchanged lines hidden ---