r8a77990.dtsi (03abfdd31c66f0ecd629a1d1362e87551ce6c027) r8a77990.dtsi (a582013b7b1a6fbe9e896b5686887bc804800fe0)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

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662 interrupt-names = "ch0", "ch1";
663 clocks = <&cpg CPG_MOD 331>;
664 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
665 resets = <&cpg 331>;
666 #dma-cells = <1>;
667 dma-channels = <2>;
668 };
669
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

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662 interrupt-names = "ch0", "ch1";
663 clocks = <&cpg CPG_MOD 331>;
664 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
665 resets = <&cpg 331>;
666 #dma-cells = <1>;
667 dma-channels = <2>;
668 };
669
670 arm_cc630p: crypto@e6601000 {
671 compatible = "arm,cryptocell-630p-ree";
672 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
673 reg = <0x0 0xe6601000 0 0x1000>;
674 clocks = <&cpg CPG_MOD 229>;
675 resets = <&cpg 229>;
676 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
677 };
678
670 dmac0: dma-controller@e6700000 {
671 compatible = "renesas,dmac-r8a77990",
672 "renesas,rcar-dmac";
673 reg = <0 0xe6700000 0 0x10000>;
674 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
675 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
676 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
677 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,

--- 1247 unchanged lines hidden --- 		679 dmac0: dma-controller@e6700000 {
680 compatible = "renesas,dmac-r8a77990",
681 "renesas,rcar-dmac";
682 reg = <0 0xe6700000 0 0x10000>;
683 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
684 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
685 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
686 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,

--- 1247 unchanged lines hidden ---