1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 /* 29 * The external audio clocks are configured as 0 Hz fixed frequency 30 * clocks by default. 31 * Boards that provide audio clocks should override them. 32 */ 33 audio_clk_a: audio_clk_a { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_b: audio_clk_b { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 audio_clk_c: audio_clk_c { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 51 /* External CAN clock - to be overridden by boards that provide it */ 52 can_clk: can { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 cluster1_opp: opp_table10 { 59 compatible = "operating-points-v2"; 60 opp-shared; 61 opp-800000000 { 62 opp-hz = /bits/ 64 <800000000>; 63 opp-microvolt = <820000>; 64 clock-latency-ns = <300000>; 65 }; 66 opp-1000000000 { 67 opp-hz = /bits/ 64 <1000000000>; 68 opp-microvolt = <820000>; 69 clock-latency-ns = <300000>; 70 }; 71 opp-1200000000 { 72 opp-hz = /bits/ 64 <1200000000>; 73 opp-microvolt = <820000>; 74 clock-latency-ns = <300000>; 75 opp-suspend; 76 }; 77 }; 78 79 cpus { 80 #address-cells = <1>; 81 #size-cells = <0>; 82 83 a53_0: cpu@0 { 84 compatible = "arm,cortex-a53"; 85 reg = <0>; 86 device_type = "cpu"; 87 #cooling-cells = <2>; 88 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 89 next-level-cache = <&L2_CA53>; 90 enable-method = "psci"; 91 dynamic-power-coefficient = <277>; 92 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 93 operating-points-v2 = <&cluster1_opp>; 94 }; 95 96 a53_1: cpu@1 { 97 compatible = "arm,cortex-a53"; 98 reg = <1>; 99 device_type = "cpu"; 100 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 101 next-level-cache = <&L2_CA53>; 102 enable-method = "psci"; 103 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 104 operating-points-v2 = <&cluster1_opp>; 105 }; 106 107 L2_CA53: cache-controller-0 { 108 compatible = "cache"; 109 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 110 cache-unified; 111 cache-level = <2>; 112 }; 113 }; 114 115 extal_clk: extal { 116 compatible = "fixed-clock"; 117 #clock-cells = <0>; 118 /* This value must be overridden by the board */ 119 clock-frequency = <0>; 120 }; 121 122 /* External PCIe clock - can be overridden by the board */ 123 pcie_bus_clk: pcie_bus { 124 compatible = "fixed-clock"; 125 #clock-cells = <0>; 126 clock-frequency = <0>; 127 }; 128 129 pmu_a53 { 130 compatible = "arm,cortex-a53-pmu"; 131 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 132 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 133 interrupt-affinity = <&a53_0>, <&a53_1>; 134 }; 135 136 psci { 137 compatible = "arm,psci-1.0", "arm,psci-0.2"; 138 method = "smc"; 139 }; 140 141 /* External SCIF clock - to be overridden by boards that provide it */ 142 scif_clk: scif { 143 compatible = "fixed-clock"; 144 #clock-cells = <0>; 145 clock-frequency = <0>; 146 }; 147 148 soc: soc { 149 compatible = "simple-bus"; 150 interrupt-parent = <&gic>; 151 #address-cells = <2>; 152 #size-cells = <2>; 153 ranges; 154 155 rwdt: watchdog@e6020000 { 156 compatible = "renesas,r8a77990-wdt", 157 "renesas,rcar-gen3-wdt"; 158 reg = <0 0xe6020000 0 0x0c>; 159 clocks = <&cpg CPG_MOD 402>; 160 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 161 resets = <&cpg 402>; 162 status = "disabled"; 163 }; 164 165 gpio0: gpio@e6050000 { 166 compatible = "renesas,gpio-r8a77990", 167 "renesas,rcar-gen3-gpio"; 168 reg = <0 0xe6050000 0 0x50>; 169 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 170 #gpio-cells = <2>; 171 gpio-controller; 172 gpio-ranges = <&pfc 0 0 18>; 173 #interrupt-cells = <2>; 174 interrupt-controller; 175 clocks = <&cpg CPG_MOD 912>; 176 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 177 resets = <&cpg 912>; 178 }; 179 180 gpio1: gpio@e6051000 { 181 compatible = "renesas,gpio-r8a77990", 182 "renesas,rcar-gen3-gpio"; 183 reg = <0 0xe6051000 0 0x50>; 184 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 185 #gpio-cells = <2>; 186 gpio-controller; 187 gpio-ranges = <&pfc 0 32 23>; 188 #interrupt-cells = <2>; 189 interrupt-controller; 190 clocks = <&cpg CPG_MOD 911>; 191 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 192 resets = <&cpg 911>; 193 }; 194 195 gpio2: gpio@e6052000 { 196 compatible = "renesas,gpio-r8a77990", 197 "renesas,rcar-gen3-gpio"; 198 reg = <0 0xe6052000 0 0x50>; 199 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 200 #gpio-cells = <2>; 201 gpio-controller; 202 gpio-ranges = <&pfc 0 64 26>; 203 #interrupt-cells = <2>; 204 interrupt-controller; 205 clocks = <&cpg CPG_MOD 910>; 206 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 207 resets = <&cpg 910>; 208 }; 209 210 gpio3: gpio@e6053000 { 211 compatible = "renesas,gpio-r8a77990", 212 "renesas,rcar-gen3-gpio"; 213 reg = <0 0xe6053000 0 0x50>; 214 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 215 #gpio-cells = <2>; 216 gpio-controller; 217 gpio-ranges = <&pfc 0 96 16>; 218 #interrupt-cells = <2>; 219 interrupt-controller; 220 clocks = <&cpg CPG_MOD 909>; 221 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 222 resets = <&cpg 909>; 223 }; 224 225 gpio4: gpio@e6054000 { 226 compatible = "renesas,gpio-r8a77990", 227 "renesas,rcar-gen3-gpio"; 228 reg = <0 0xe6054000 0 0x50>; 229 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 230 #gpio-cells = <2>; 231 gpio-controller; 232 gpio-ranges = <&pfc 0 128 11>; 233 #interrupt-cells = <2>; 234 interrupt-controller; 235 clocks = <&cpg CPG_MOD 908>; 236 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 237 resets = <&cpg 908>; 238 }; 239 240 gpio5: gpio@e6055000 { 241 compatible = "renesas,gpio-r8a77990", 242 "renesas,rcar-gen3-gpio"; 243 reg = <0 0xe6055000 0 0x50>; 244 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 245 #gpio-cells = <2>; 246 gpio-controller; 247 gpio-ranges = <&pfc 0 160 20>; 248 #interrupt-cells = <2>; 249 interrupt-controller; 250 clocks = <&cpg CPG_MOD 907>; 251 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 252 resets = <&cpg 907>; 253 }; 254 255 gpio6: gpio@e6055400 { 256 compatible = "renesas,gpio-r8a77990", 257 "renesas,rcar-gen3-gpio"; 258 reg = <0 0xe6055400 0 0x50>; 259 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 260 #gpio-cells = <2>; 261 gpio-controller; 262 gpio-ranges = <&pfc 0 192 18>; 263 #interrupt-cells = <2>; 264 interrupt-controller; 265 clocks = <&cpg CPG_MOD 906>; 266 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 267 resets = <&cpg 906>; 268 }; 269 270 pfc: pin-controller@e6060000 { 271 compatible = "renesas,pfc-r8a77990"; 272 reg = <0 0xe6060000 0 0x508>; 273 }; 274 275 i2c_dvfs: i2c@e60b0000 { 276 #address-cells = <1>; 277 #size-cells = <0>; 278 compatible = "renesas,iic-r8a77990"; 279 reg = <0 0xe60b0000 0 0x15>; 280 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 281 clocks = <&cpg CPG_MOD 926>; 282 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 283 resets = <&cpg 926>; 284 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 285 dma-names = "tx", "rx"; 286 status = "disabled"; 287 }; 288 289 cmt0: timer@e60f0000 { 290 compatible = "renesas,r8a77990-cmt0", 291 "renesas,rcar-gen3-cmt0"; 292 reg = <0 0xe60f0000 0 0x1004>; 293 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 294 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 295 clocks = <&cpg CPG_MOD 303>; 296 clock-names = "fck"; 297 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 298 resets = <&cpg 303>; 299 status = "disabled"; 300 }; 301 302 cmt1: timer@e6130000 { 303 compatible = "renesas,r8a77990-cmt1", 304 "renesas,rcar-gen3-cmt1"; 305 reg = <0 0xe6130000 0 0x1004>; 306 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 307 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 308 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 309 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 311 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 312 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 313 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 314 clocks = <&cpg CPG_MOD 302>; 315 clock-names = "fck"; 316 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 317 resets = <&cpg 302>; 318 status = "disabled"; 319 }; 320 321 cmt2: timer@e6140000 { 322 compatible = "renesas,r8a77990-cmt1", 323 "renesas,rcar-gen3-cmt1"; 324 reg = <0 0xe6140000 0 0x1004>; 325 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 332 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 333 clocks = <&cpg CPG_MOD 301>; 334 clock-names = "fck"; 335 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 336 resets = <&cpg 301>; 337 status = "disabled"; 338 }; 339 340 cmt3: timer@e6148000 { 341 compatible = "renesas,r8a77990-cmt1", 342 "renesas,rcar-gen3-cmt1"; 343 reg = <0 0xe6148000 0 0x1004>; 344 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&cpg CPG_MOD 300>; 353 clock-names = "fck"; 354 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 355 resets = <&cpg 300>; 356 status = "disabled"; 357 }; 358 359 cpg: clock-controller@e6150000 { 360 compatible = "renesas,r8a77990-cpg-mssr"; 361 reg = <0 0xe6150000 0 0x1000>; 362 clocks = <&extal_clk>; 363 clock-names = "extal"; 364 #clock-cells = <2>; 365 #power-domain-cells = <0>; 366 #reset-cells = <1>; 367 }; 368 369 rst: reset-controller@e6160000 { 370 compatible = "renesas,r8a77990-rst"; 371 reg = <0 0xe6160000 0 0x0200>; 372 }; 373 374 sysc: system-controller@e6180000 { 375 compatible = "renesas,r8a77990-sysc"; 376 reg = <0 0xe6180000 0 0x0400>; 377 #power-domain-cells = <1>; 378 }; 379 380 thermal: thermal@e6190000 { 381 compatible = "renesas,thermal-r8a77990"; 382 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 383 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 384 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 385 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 386 clocks = <&cpg CPG_MOD 522>; 387 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 388 resets = <&cpg 522>; 389 #thermal-sensor-cells = <0>; 390 }; 391 392 intc_ex: interrupt-controller@e61c0000 { 393 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 394 #interrupt-cells = <2>; 395 interrupt-controller; 396 reg = <0 0xe61c0000 0 0x200>; 397 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 403 clocks = <&cpg CPG_MOD 407>; 404 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 405 resets = <&cpg 407>; 406 }; 407 408 i2c0: i2c@e6500000 { 409 #address-cells = <1>; 410 #size-cells = <0>; 411 compatible = "renesas,i2c-r8a77990", 412 "renesas,rcar-gen3-i2c"; 413 reg = <0 0xe6500000 0 0x40>; 414 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 415 clocks = <&cpg CPG_MOD 931>; 416 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 417 resets = <&cpg 931>; 418 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 419 <&dmac2 0x91>, <&dmac2 0x90>; 420 dma-names = "tx", "rx", "tx", "rx"; 421 i2c-scl-internal-delay-ns = <110>; 422 status = "disabled"; 423 }; 424 425 i2c1: i2c@e6508000 { 426 #address-cells = <1>; 427 #size-cells = <0>; 428 compatible = "renesas,i2c-r8a77990", 429 "renesas,rcar-gen3-i2c"; 430 reg = <0 0xe6508000 0 0x40>; 431 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 432 clocks = <&cpg CPG_MOD 930>; 433 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 434 resets = <&cpg 930>; 435 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 436 <&dmac2 0x93>, <&dmac2 0x92>; 437 dma-names = "tx", "rx", "tx", "rx"; 438 i2c-scl-internal-delay-ns = <6>; 439 status = "disabled"; 440 }; 441 442 i2c2: i2c@e6510000 { 443 #address-cells = <1>; 444 #size-cells = <0>; 445 compatible = "renesas,i2c-r8a77990", 446 "renesas,rcar-gen3-i2c"; 447 reg = <0 0xe6510000 0 0x40>; 448 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 449 clocks = <&cpg CPG_MOD 929>; 450 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 451 resets = <&cpg 929>; 452 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 453 <&dmac2 0x95>, <&dmac2 0x94>; 454 dma-names = "tx", "rx", "tx", "rx"; 455 i2c-scl-internal-delay-ns = <6>; 456 status = "disabled"; 457 }; 458 459 i2c3: i2c@e66d0000 { 460 #address-cells = <1>; 461 #size-cells = <0>; 462 compatible = "renesas,i2c-r8a77990", 463 "renesas,rcar-gen3-i2c"; 464 reg = <0 0xe66d0000 0 0x40>; 465 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 466 clocks = <&cpg CPG_MOD 928>; 467 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 468 resets = <&cpg 928>; 469 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 470 dma-names = "tx", "rx"; 471 i2c-scl-internal-delay-ns = <110>; 472 status = "disabled"; 473 }; 474 475 i2c4: i2c@e66d8000 { 476 #address-cells = <1>; 477 #size-cells = <0>; 478 compatible = "renesas,i2c-r8a77990", 479 "renesas,rcar-gen3-i2c"; 480 reg = <0 0xe66d8000 0 0x40>; 481 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 482 clocks = <&cpg CPG_MOD 927>; 483 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 484 resets = <&cpg 927>; 485 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 486 dma-names = "tx", "rx"; 487 i2c-scl-internal-delay-ns = <6>; 488 status = "disabled"; 489 }; 490 491 i2c5: i2c@e66e0000 { 492 #address-cells = <1>; 493 #size-cells = <0>; 494 compatible = "renesas,i2c-r8a77990", 495 "renesas,rcar-gen3-i2c"; 496 reg = <0 0xe66e0000 0 0x40>; 497 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 498 clocks = <&cpg CPG_MOD 919>; 499 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 500 resets = <&cpg 919>; 501 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 502 dma-names = "tx", "rx"; 503 i2c-scl-internal-delay-ns = <6>; 504 status = "disabled"; 505 }; 506 507 i2c6: i2c@e66e8000 { 508 #address-cells = <1>; 509 #size-cells = <0>; 510 compatible = "renesas,i2c-r8a77990", 511 "renesas,rcar-gen3-i2c"; 512 reg = <0 0xe66e8000 0 0x40>; 513 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 514 clocks = <&cpg CPG_MOD 918>; 515 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 516 resets = <&cpg 918>; 517 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 518 dma-names = "tx", "rx"; 519 i2c-scl-internal-delay-ns = <6>; 520 status = "disabled"; 521 }; 522 523 i2c7: i2c@e6690000 { 524 #address-cells = <1>; 525 #size-cells = <0>; 526 compatible = "renesas,i2c-r8a77990", 527 "renesas,rcar-gen3-i2c"; 528 reg = <0 0xe6690000 0 0x40>; 529 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&cpg CPG_MOD 1003>; 531 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 532 resets = <&cpg 1003>; 533 i2c-scl-internal-delay-ns = <6>; 534 status = "disabled"; 535 }; 536 537 hscif0: serial@e6540000 { 538 compatible = "renesas,hscif-r8a77990", 539 "renesas,rcar-gen3-hscif", 540 "renesas,hscif"; 541 reg = <0 0xe6540000 0 0x60>; 542 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 543 clocks = <&cpg CPG_MOD 520>, 544 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 545 <&scif_clk>; 546 clock-names = "fck", "brg_int", "scif_clk"; 547 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 548 <&dmac2 0x31>, <&dmac2 0x30>; 549 dma-names = "tx", "rx", "tx", "rx"; 550 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 551 resets = <&cpg 520>; 552 status = "disabled"; 553 }; 554 555 hscif1: serial@e6550000 { 556 compatible = "renesas,hscif-r8a77990", 557 "renesas,rcar-gen3-hscif", 558 "renesas,hscif"; 559 reg = <0 0xe6550000 0 0x60>; 560 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 561 clocks = <&cpg CPG_MOD 519>, 562 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 563 <&scif_clk>; 564 clock-names = "fck", "brg_int", "scif_clk"; 565 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 566 <&dmac2 0x33>, <&dmac2 0x32>; 567 dma-names = "tx", "rx", "tx", "rx"; 568 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 569 resets = <&cpg 519>; 570 status = "disabled"; 571 }; 572 573 hscif2: serial@e6560000 { 574 compatible = "renesas,hscif-r8a77990", 575 "renesas,rcar-gen3-hscif", 576 "renesas,hscif"; 577 reg = <0 0xe6560000 0 0x60>; 578 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 579 clocks = <&cpg CPG_MOD 518>, 580 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 581 <&scif_clk>; 582 clock-names = "fck", "brg_int", "scif_clk"; 583 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 584 <&dmac2 0x35>, <&dmac2 0x34>; 585 dma-names = "tx", "rx", "tx", "rx"; 586 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 587 resets = <&cpg 518>; 588 status = "disabled"; 589 }; 590 591 hscif3: serial@e66a0000 { 592 compatible = "renesas,hscif-r8a77990", 593 "renesas,rcar-gen3-hscif", 594 "renesas,hscif"; 595 reg = <0 0xe66a0000 0 0x60>; 596 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 597 clocks = <&cpg CPG_MOD 517>, 598 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 599 <&scif_clk>; 600 clock-names = "fck", "brg_int", "scif_clk"; 601 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 602 dma-names = "tx", "rx"; 603 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 604 resets = <&cpg 517>; 605 status = "disabled"; 606 }; 607 608 hscif4: serial@e66b0000 { 609 compatible = "renesas,hscif-r8a77990", 610 "renesas,rcar-gen3-hscif", 611 "renesas,hscif"; 612 reg = <0 0xe66b0000 0 0x60>; 613 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 614 clocks = <&cpg CPG_MOD 516>, 615 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 616 <&scif_clk>; 617 clock-names = "fck", "brg_int", "scif_clk"; 618 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 619 dma-names = "tx", "rx"; 620 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 621 resets = <&cpg 516>; 622 status = "disabled"; 623 }; 624 625 hsusb: usb@e6590000 { 626 compatible = "renesas,usbhs-r8a77990", 627 "renesas,rcar-gen3-usbhs"; 628 reg = <0 0xe6590000 0 0x200>; 629 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 630 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 631 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 632 <&usb_dmac1 0>, <&usb_dmac1 1>; 633 dma-names = "ch0", "ch1", "ch2", "ch3"; 634 renesas,buswait = <11>; 635 phys = <&usb2_phy0 3>; 636 phy-names = "usb"; 637 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 638 resets = <&cpg 704>, <&cpg 703>; 639 status = "disabled"; 640 }; 641 642 usb_dmac0: dma-controller@e65a0000 { 643 compatible = "renesas,r8a77990-usb-dmac", 644 "renesas,usb-dmac"; 645 reg = <0 0xe65a0000 0 0x100>; 646 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 647 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 648 interrupt-names = "ch0", "ch1"; 649 clocks = <&cpg CPG_MOD 330>; 650 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 651 resets = <&cpg 330>; 652 #dma-cells = <1>; 653 dma-channels = <2>; 654 }; 655 656 usb_dmac1: dma-controller@e65b0000 { 657 compatible = "renesas,r8a77990-usb-dmac", 658 "renesas,usb-dmac"; 659 reg = <0 0xe65b0000 0 0x100>; 660 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 661 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 662 interrupt-names = "ch0", "ch1"; 663 clocks = <&cpg CPG_MOD 331>; 664 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 665 resets = <&cpg 331>; 666 #dma-cells = <1>; 667 dma-channels = <2>; 668 }; 669 670 arm_cc630p: crypto@e6601000 { 671 compatible = "arm,cryptocell-630p-ree"; 672 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 673 reg = <0x0 0xe6601000 0 0x1000>; 674 clocks = <&cpg CPG_MOD 229>; 675 resets = <&cpg 229>; 676 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 677 }; 678 679 dmac0: dma-controller@e6700000 { 680 compatible = "renesas,dmac-r8a77990", 681 "renesas,rcar-dmac"; 682 reg = <0 0xe6700000 0 0x10000>; 683 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 684 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 685 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 686 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 687 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 688 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 689 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 690 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 691 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 692 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 693 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 694 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 695 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 696 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 697 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 698 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 699 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 700 interrupt-names = "error", 701 "ch0", "ch1", "ch2", "ch3", 702 "ch4", "ch5", "ch6", "ch7", 703 "ch8", "ch9", "ch10", "ch11", 704 "ch12", "ch13", "ch14", "ch15"; 705 clocks = <&cpg CPG_MOD 219>; 706 clock-names = "fck"; 707 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 708 resets = <&cpg 219>; 709 #dma-cells = <1>; 710 dma-channels = <16>; 711 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 712 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 713 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 714 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 715 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 716 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 717 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 718 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 719 }; 720 721 dmac1: dma-controller@e7300000 { 722 compatible = "renesas,dmac-r8a77990", 723 "renesas,rcar-dmac"; 724 reg = <0 0xe7300000 0 0x10000>; 725 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 726 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 727 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 728 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 729 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 730 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 731 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 732 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 733 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 734 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 735 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 736 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 737 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 738 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 739 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 740 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 741 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 742 interrupt-names = "error", 743 "ch0", "ch1", "ch2", "ch3", 744 "ch4", "ch5", "ch6", "ch7", 745 "ch8", "ch9", "ch10", "ch11", 746 "ch12", "ch13", "ch14", "ch15"; 747 clocks = <&cpg CPG_MOD 218>; 748 clock-names = "fck"; 749 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 750 resets = <&cpg 218>; 751 #dma-cells = <1>; 752 dma-channels = <16>; 753 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 754 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 755 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 756 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 757 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 758 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 759 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 760 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 761 }; 762 763 dmac2: dma-controller@e7310000 { 764 compatible = "renesas,dmac-r8a77990", 765 "renesas,rcar-dmac"; 766 reg = <0 0xe7310000 0 0x10000>; 767 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 784 interrupt-names = "error", 785 "ch0", "ch1", "ch2", "ch3", 786 "ch4", "ch5", "ch6", "ch7", 787 "ch8", "ch9", "ch10", "ch11", 788 "ch12", "ch13", "ch14", "ch15"; 789 clocks = <&cpg CPG_MOD 217>; 790 clock-names = "fck"; 791 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 792 resets = <&cpg 217>; 793 #dma-cells = <1>; 794 dma-channels = <16>; 795 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 796 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 797 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 798 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 799 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 800 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 801 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 802 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 803 }; 804 805 ipmmu_ds0: mmu@e6740000 { 806 compatible = "renesas,ipmmu-r8a77990"; 807 reg = <0 0xe6740000 0 0x1000>; 808 renesas,ipmmu-main = <&ipmmu_mm 0>; 809 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 810 #iommu-cells = <1>; 811 }; 812 813 ipmmu_ds1: mmu@e7740000 { 814 compatible = "renesas,ipmmu-r8a77990"; 815 reg = <0 0xe7740000 0 0x1000>; 816 renesas,ipmmu-main = <&ipmmu_mm 1>; 817 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 818 #iommu-cells = <1>; 819 }; 820 821 ipmmu_hc: mmu@e6570000 { 822 compatible = "renesas,ipmmu-r8a77990"; 823 reg = <0 0xe6570000 0 0x1000>; 824 renesas,ipmmu-main = <&ipmmu_mm 2>; 825 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 826 #iommu-cells = <1>; 827 }; 828 829 ipmmu_mm: mmu@e67b0000 { 830 compatible = "renesas,ipmmu-r8a77990"; 831 reg = <0 0xe67b0000 0 0x1000>; 832 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 834 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 835 #iommu-cells = <1>; 836 }; 837 838 ipmmu_mp: mmu@ec670000 { 839 compatible = "renesas,ipmmu-r8a77990"; 840 reg = <0 0xec670000 0 0x1000>; 841 renesas,ipmmu-main = <&ipmmu_mm 4>; 842 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 843 #iommu-cells = <1>; 844 }; 845 846 ipmmu_pv0: mmu@fd800000 { 847 compatible = "renesas,ipmmu-r8a77990"; 848 reg = <0 0xfd800000 0 0x1000>; 849 renesas,ipmmu-main = <&ipmmu_mm 6>; 850 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 851 #iommu-cells = <1>; 852 }; 853 854 ipmmu_rt: mmu@ffc80000 { 855 compatible = "renesas,ipmmu-r8a77990"; 856 reg = <0 0xffc80000 0 0x1000>; 857 renesas,ipmmu-main = <&ipmmu_mm 10>; 858 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 859 #iommu-cells = <1>; 860 }; 861 862 ipmmu_vc0: mmu@fe6b0000 { 863 compatible = "renesas,ipmmu-r8a77990"; 864 reg = <0 0xfe6b0000 0 0x1000>; 865 renesas,ipmmu-main = <&ipmmu_mm 12>; 866 power-domains = <&sysc R8A77990_PD_A3VC>; 867 #iommu-cells = <1>; 868 }; 869 870 ipmmu_vi0: mmu@febd0000 { 871 compatible = "renesas,ipmmu-r8a77990"; 872 reg = <0 0xfebd0000 0 0x1000>; 873 renesas,ipmmu-main = <&ipmmu_mm 14>; 874 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 875 #iommu-cells = <1>; 876 }; 877 878 ipmmu_vp0: mmu@fe990000 { 879 compatible = "renesas,ipmmu-r8a77990"; 880 reg = <0 0xfe990000 0 0x1000>; 881 renesas,ipmmu-main = <&ipmmu_mm 16>; 882 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 883 #iommu-cells = <1>; 884 }; 885 886 avb: ethernet@e6800000 { 887 compatible = "renesas,etheravb-r8a77990", 888 "renesas,etheravb-rcar-gen3"; 889 reg = <0 0xe6800000 0 0x800>; 890 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 892 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 893 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 894 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 895 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 896 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 897 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 898 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 899 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 900 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 901 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 904 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 905 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 906 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 907 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 908 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 909 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 910 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 911 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 912 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 913 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 914 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 915 interrupt-names = "ch0", "ch1", "ch2", "ch3", 916 "ch4", "ch5", "ch6", "ch7", 917 "ch8", "ch9", "ch10", "ch11", 918 "ch12", "ch13", "ch14", "ch15", 919 "ch16", "ch17", "ch18", "ch19", 920 "ch20", "ch21", "ch22", "ch23", 921 "ch24"; 922 clocks = <&cpg CPG_MOD 812>; 923 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 924 resets = <&cpg 812>; 925 phy-mode = "rgmii"; 926 iommus = <&ipmmu_ds0 16>; 927 #address-cells = <1>; 928 #size-cells = <0>; 929 status = "disabled"; 930 }; 931 932 can0: can@e6c30000 { 933 compatible = "renesas,can-r8a77990", 934 "renesas,rcar-gen3-can"; 935 reg = <0 0xe6c30000 0 0x1000>; 936 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 937 clocks = <&cpg CPG_MOD 916>, 938 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 939 <&can_clk>; 940 clock-names = "clkp1", "clkp2", "can_clk"; 941 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 942 assigned-clock-rates = <40000000>; 943 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 944 resets = <&cpg 916>; 945 status = "disabled"; 946 }; 947 948 can1: can@e6c38000 { 949 compatible = "renesas,can-r8a77990", 950 "renesas,rcar-gen3-can"; 951 reg = <0 0xe6c38000 0 0x1000>; 952 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 953 clocks = <&cpg CPG_MOD 915>, 954 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 955 <&can_clk>; 956 clock-names = "clkp1", "clkp2", "can_clk"; 957 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 958 assigned-clock-rates = <40000000>; 959 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 960 resets = <&cpg 915>; 961 status = "disabled"; 962 }; 963 964 canfd: can@e66c0000 { 965 compatible = "renesas,r8a77990-canfd", 966 "renesas,rcar-gen3-canfd"; 967 reg = <0 0xe66c0000 0 0x8000>; 968 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 969 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 970 clocks = <&cpg CPG_MOD 914>, 971 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 972 <&can_clk>; 973 clock-names = "fck", "canfd", "can_clk"; 974 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 975 assigned-clock-rates = <40000000>; 976 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 977 resets = <&cpg 914>; 978 status = "disabled"; 979 980 channel0 { 981 status = "disabled"; 982 }; 983 984 channel1 { 985 status = "disabled"; 986 }; 987 }; 988 989 pwm0: pwm@e6e30000 { 990 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 991 reg = <0 0xe6e30000 0 0x8>; 992 clocks = <&cpg CPG_MOD 523>; 993 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 994 resets = <&cpg 523>; 995 #pwm-cells = <2>; 996 status = "disabled"; 997 }; 998 999 pwm1: pwm@e6e31000 { 1000 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1001 reg = <0 0xe6e31000 0 0x8>; 1002 clocks = <&cpg CPG_MOD 523>; 1003 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1004 resets = <&cpg 523>; 1005 #pwm-cells = <2>; 1006 status = "disabled"; 1007 }; 1008 1009 pwm2: pwm@e6e32000 { 1010 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1011 reg = <0 0xe6e32000 0 0x8>; 1012 clocks = <&cpg CPG_MOD 523>; 1013 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1014 resets = <&cpg 523>; 1015 #pwm-cells = <2>; 1016 status = "disabled"; 1017 }; 1018 1019 pwm3: pwm@e6e33000 { 1020 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1021 reg = <0 0xe6e33000 0 0x8>; 1022 clocks = <&cpg CPG_MOD 523>; 1023 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1024 resets = <&cpg 523>; 1025 #pwm-cells = <2>; 1026 status = "disabled"; 1027 }; 1028 1029 pwm4: pwm@e6e34000 { 1030 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1031 reg = <0 0xe6e34000 0 0x8>; 1032 clocks = <&cpg CPG_MOD 523>; 1033 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1034 resets = <&cpg 523>; 1035 #pwm-cells = <2>; 1036 status = "disabled"; 1037 }; 1038 1039 pwm5: pwm@e6e35000 { 1040 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1041 reg = <0 0xe6e35000 0 0x8>; 1042 clocks = <&cpg CPG_MOD 523>; 1043 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1044 resets = <&cpg 523>; 1045 #pwm-cells = <2>; 1046 status = "disabled"; 1047 }; 1048 1049 pwm6: pwm@e6e36000 { 1050 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1051 reg = <0 0xe6e36000 0 0x8>; 1052 clocks = <&cpg CPG_MOD 523>; 1053 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1054 resets = <&cpg 523>; 1055 #pwm-cells = <2>; 1056 status = "disabled"; 1057 }; 1058 1059 scif0: serial@e6e60000 { 1060 compatible = "renesas,scif-r8a77990", 1061 "renesas,rcar-gen3-scif", "renesas,scif"; 1062 reg = <0 0xe6e60000 0 64>; 1063 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1064 clocks = <&cpg CPG_MOD 207>, 1065 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1066 <&scif_clk>; 1067 clock-names = "fck", "brg_int", "scif_clk"; 1068 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1069 <&dmac2 0x51>, <&dmac2 0x50>; 1070 dma-names = "tx", "rx", "tx", "rx"; 1071 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1072 resets = <&cpg 207>; 1073 status = "disabled"; 1074 }; 1075 1076 scif1: serial@e6e68000 { 1077 compatible = "renesas,scif-r8a77990", 1078 "renesas,rcar-gen3-scif", "renesas,scif"; 1079 reg = <0 0xe6e68000 0 64>; 1080 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1081 clocks = <&cpg CPG_MOD 206>, 1082 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1083 <&scif_clk>; 1084 clock-names = "fck", "brg_int", "scif_clk"; 1085 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1086 <&dmac2 0x53>, <&dmac2 0x52>; 1087 dma-names = "tx", "rx", "tx", "rx"; 1088 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1089 resets = <&cpg 206>; 1090 status = "disabled"; 1091 }; 1092 1093 scif2: serial@e6e88000 { 1094 compatible = "renesas,scif-r8a77990", 1095 "renesas,rcar-gen3-scif", "renesas,scif"; 1096 reg = <0 0xe6e88000 0 64>; 1097 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1098 clocks = <&cpg CPG_MOD 310>, 1099 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1100 <&scif_clk>; 1101 clock-names = "fck", "brg_int", "scif_clk"; 1102 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1103 <&dmac2 0x13>, <&dmac2 0x12>; 1104 dma-names = "tx", "rx", "tx", "rx"; 1105 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1106 resets = <&cpg 310>; 1107 status = "disabled"; 1108 }; 1109 1110 scif3: serial@e6c50000 { 1111 compatible = "renesas,scif-r8a77990", 1112 "renesas,rcar-gen3-scif", "renesas,scif"; 1113 reg = <0 0xe6c50000 0 64>; 1114 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1115 clocks = <&cpg CPG_MOD 204>, 1116 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1117 <&scif_clk>; 1118 clock-names = "fck", "brg_int", "scif_clk"; 1119 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1120 dma-names = "tx", "rx"; 1121 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1122 resets = <&cpg 204>; 1123 status = "disabled"; 1124 }; 1125 1126 scif4: serial@e6c40000 { 1127 compatible = "renesas,scif-r8a77990", 1128 "renesas,rcar-gen3-scif", "renesas,scif"; 1129 reg = <0 0xe6c40000 0 64>; 1130 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1131 clocks = <&cpg CPG_MOD 203>, 1132 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1133 <&scif_clk>; 1134 clock-names = "fck", "brg_int", "scif_clk"; 1135 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1136 dma-names = "tx", "rx"; 1137 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1138 resets = <&cpg 203>; 1139 status = "disabled"; 1140 }; 1141 1142 scif5: serial@e6f30000 { 1143 compatible = "renesas,scif-r8a77990", 1144 "renesas,rcar-gen3-scif", "renesas,scif"; 1145 reg = <0 0xe6f30000 0 64>; 1146 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1147 clocks = <&cpg CPG_MOD 202>, 1148 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1149 <&scif_clk>; 1150 clock-names = "fck", "brg_int", "scif_clk"; 1151 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; 1152 dma-names = "tx", "rx"; 1153 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1154 resets = <&cpg 202>; 1155 status = "disabled"; 1156 }; 1157 1158 msiof0: spi@e6e90000 { 1159 compatible = "renesas,msiof-r8a77990", 1160 "renesas,rcar-gen3-msiof"; 1161 reg = <0 0xe6e90000 0 0x0064>; 1162 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1163 clocks = <&cpg CPG_MOD 211>; 1164 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1165 <&dmac2 0x41>, <&dmac2 0x40>; 1166 dma-names = "tx", "rx", "tx", "rx"; 1167 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1168 resets = <&cpg 211>; 1169 #address-cells = <1>; 1170 #size-cells = <0>; 1171 status = "disabled"; 1172 }; 1173 1174 msiof1: spi@e6ea0000 { 1175 compatible = "renesas,msiof-r8a77990", 1176 "renesas,rcar-gen3-msiof"; 1177 reg = <0 0xe6ea0000 0 0x0064>; 1178 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1179 clocks = <&cpg CPG_MOD 210>; 1180 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1181 <&dmac2 0x43>, <&dmac2 0x42>; 1182 dma-names = "tx", "rx", "tx", "rx"; 1183 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1184 resets = <&cpg 210>; 1185 #address-cells = <1>; 1186 #size-cells = <0>; 1187 status = "disabled"; 1188 }; 1189 1190 msiof2: spi@e6c00000 { 1191 compatible = "renesas,msiof-r8a77990", 1192 "renesas,rcar-gen3-msiof"; 1193 reg = <0 0xe6c00000 0 0x0064>; 1194 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1195 clocks = <&cpg CPG_MOD 209>; 1196 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1197 dma-names = "tx", "rx"; 1198 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1199 resets = <&cpg 209>; 1200 #address-cells = <1>; 1201 #size-cells = <0>; 1202 status = "disabled"; 1203 }; 1204 1205 msiof3: spi@e6c10000 { 1206 compatible = "renesas,msiof-r8a77990", 1207 "renesas,rcar-gen3-msiof"; 1208 reg = <0 0xe6c10000 0 0x0064>; 1209 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1210 clocks = <&cpg CPG_MOD 208>; 1211 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1212 dma-names = "tx", "rx"; 1213 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1214 resets = <&cpg 208>; 1215 #address-cells = <1>; 1216 #size-cells = <0>; 1217 status = "disabled"; 1218 }; 1219 1220 vin4: video@e6ef4000 { 1221 compatible = "renesas,vin-r8a77990"; 1222 reg = <0 0xe6ef4000 0 0x1000>; 1223 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1224 clocks = <&cpg CPG_MOD 807>; 1225 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1226 resets = <&cpg 807>; 1227 renesas,id = <4>; 1228 status = "disabled"; 1229 1230 ports { 1231 #address-cells = <1>; 1232 #size-cells = <0>; 1233 1234 port@1 { 1235 #address-cells = <1>; 1236 #size-cells = <0>; 1237 1238 reg = <1>; 1239 1240 vin4csi40: endpoint@2 { 1241 reg = <2>; 1242 remote-endpoint= <&csi40vin4>; 1243 }; 1244 }; 1245 }; 1246 }; 1247 1248 vin5: video@e6ef5000 { 1249 compatible = "renesas,vin-r8a77990"; 1250 reg = <0 0xe6ef5000 0 0x1000>; 1251 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1252 clocks = <&cpg CPG_MOD 806>; 1253 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1254 resets = <&cpg 806>; 1255 renesas,id = <5>; 1256 status = "disabled"; 1257 1258 ports { 1259 #address-cells = <1>; 1260 #size-cells = <0>; 1261 1262 port@1 { 1263 #address-cells = <1>; 1264 #size-cells = <0>; 1265 1266 reg = <1>; 1267 1268 vin5csi40: endpoint@2 { 1269 reg = <2>; 1270 remote-endpoint= <&csi40vin5>; 1271 }; 1272 }; 1273 }; 1274 }; 1275 1276 rcar_sound: sound@ec500000 { 1277 /* 1278 * #sound-dai-cells is required 1279 * 1280 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1281 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1282 */ 1283 /* 1284 * #clock-cells is required for audio_clkout0/1/2/3 1285 * 1286 * clkout : #clock-cells = <0>; <&rcar_sound>; 1287 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1288 */ 1289 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1290 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1291 <0 0xec5a0000 0 0x100>, /* ADG */ 1292 <0 0xec540000 0 0x1000>, /* SSIU */ 1293 <0 0xec541000 0 0x280>, /* SSI */ 1294 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1295 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1296 1297 clocks = <&cpg CPG_MOD 1005>, 1298 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1299 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1300 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1301 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1302 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1303 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1304 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1305 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1306 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1307 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1308 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1309 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1310 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1311 <&audio_clk_a>, <&audio_clk_b>, 1312 <&audio_clk_c>, 1313 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 1314 clock-names = "ssi-all", 1315 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1316 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1317 "ssi.1", "ssi.0", 1318 "src.9", "src.8", "src.7", "src.6", 1319 "src.5", "src.4", "src.3", "src.2", 1320 "src.1", "src.0", 1321 "mix.1", "mix.0", 1322 "ctu.1", "ctu.0", 1323 "dvc.0", "dvc.1", 1324 "clk_a", "clk_b", "clk_c", "clk_i"; 1325 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1326 resets = <&cpg 1005>, 1327 <&cpg 1006>, <&cpg 1007>, 1328 <&cpg 1008>, <&cpg 1009>, 1329 <&cpg 1010>, <&cpg 1011>, 1330 <&cpg 1012>, <&cpg 1013>, 1331 <&cpg 1014>, <&cpg 1015>; 1332 reset-names = "ssi-all", 1333 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1334 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1335 "ssi.1", "ssi.0"; 1336 status = "disabled"; 1337 1338 rcar_sound,ctu { 1339 ctu00: ctu-0 { }; 1340 ctu01: ctu-1 { }; 1341 ctu02: ctu-2 { }; 1342 ctu03: ctu-3 { }; 1343 ctu10: ctu-4 { }; 1344 ctu11: ctu-5 { }; 1345 ctu12: ctu-6 { }; 1346 ctu13: ctu-7 { }; 1347 }; 1348 1349 rcar_sound,dvc { 1350 dvc0: dvc-0 { 1351 dmas = <&audma0 0xbc>; 1352 dma-names = "tx"; 1353 }; 1354 dvc1: dvc-1 { 1355 dmas = <&audma0 0xbe>; 1356 dma-names = "tx"; 1357 }; 1358 }; 1359 1360 rcar_sound,mix { 1361 mix0: mix-0 { }; 1362 mix1: mix-1 { }; 1363 }; 1364 1365 rcar_sound,src { 1366 src0: src-0 { 1367 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1368 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1369 dma-names = "rx", "tx"; 1370 }; 1371 src1: src-1 { 1372 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1373 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1374 dma-names = "rx", "tx"; 1375 }; 1376 src2: src-2 { 1377 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1378 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1379 dma-names = "rx", "tx"; 1380 }; 1381 src3: src-3 { 1382 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1383 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1384 dma-names = "rx", "tx"; 1385 }; 1386 src4: src-4 { 1387 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1388 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1389 dma-names = "rx", "tx"; 1390 }; 1391 src5: src-5 { 1392 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1393 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1394 dma-names = "rx", "tx"; 1395 }; 1396 src6: src-6 { 1397 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1398 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1399 dma-names = "rx", "tx"; 1400 }; 1401 src7: src-7 { 1402 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1403 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1404 dma-names = "rx", "tx"; 1405 }; 1406 src8: src-8 { 1407 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1408 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1409 dma-names = "rx", "tx"; 1410 }; 1411 src9: src-9 { 1412 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1413 dmas = <&audma0 0x97>, <&audma0 0xba>; 1414 dma-names = "rx", "tx"; 1415 }; 1416 }; 1417 1418 rcar_sound,ssi { 1419 ssi0: ssi-0 { 1420 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1421 dmas = <&audma0 0x01>, <&audma0 0x02>, 1422 <&audma0 0x15>, <&audma0 0x16>; 1423 dma-names = "rx", "tx", "rxu", "txu"; 1424 }; 1425 ssi1: ssi-1 { 1426 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1427 dmas = <&audma0 0x03>, <&audma0 0x04>, 1428 <&audma0 0x49>, <&audma0 0x4a>; 1429 dma-names = "rx", "tx", "rxu", "txu"; 1430 }; 1431 ssi2: ssi-2 { 1432 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1433 dmas = <&audma0 0x05>, <&audma0 0x06>, 1434 <&audma0 0x63>, <&audma0 0x64>; 1435 dma-names = "rx", "tx", "rxu", "txu"; 1436 }; 1437 ssi3: ssi-3 { 1438 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1439 dmas = <&audma0 0x07>, <&audma0 0x08>, 1440 <&audma0 0x6f>, <&audma0 0x70>; 1441 dma-names = "rx", "tx", "rxu", "txu"; 1442 }; 1443 ssi4: ssi-4 { 1444 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1445 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1446 <&audma0 0x71>, <&audma0 0x72>; 1447 dma-names = "rx", "tx", "rxu", "txu"; 1448 }; 1449 ssi5: ssi-5 { 1450 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1451 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1452 <&audma0 0x73>, <&audma0 0x74>; 1453 dma-names = "rx", "tx", "rxu", "txu"; 1454 }; 1455 ssi6: ssi-6 { 1456 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1457 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1458 <&audma0 0x75>, <&audma0 0x76>; 1459 dma-names = "rx", "tx", "rxu", "txu"; 1460 }; 1461 ssi7: ssi-7 { 1462 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1463 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1464 <&audma0 0x79>, <&audma0 0x7a>; 1465 dma-names = "rx", "tx", "rxu", "txu"; 1466 }; 1467 ssi8: ssi-8 { 1468 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1469 dmas = <&audma0 0x11>, <&audma0 0x12>, 1470 <&audma0 0x7b>, <&audma0 0x7c>; 1471 dma-names = "rx", "tx", "rxu", "txu"; 1472 }; 1473 ssi9: ssi-9 { 1474 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1475 dmas = <&audma0 0x13>, <&audma0 0x14>, 1476 <&audma0 0x7d>, <&audma0 0x7e>; 1477 dma-names = "rx", "tx", "rxu", "txu"; 1478 }; 1479 }; 1480 }; 1481 1482 audma0: dma-controller@ec700000 { 1483 compatible = "renesas,dmac-r8a77990", 1484 "renesas,rcar-dmac"; 1485 reg = <0 0xec700000 0 0x10000>; 1486 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1487 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1488 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1489 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1490 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1491 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1492 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1493 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1494 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1495 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1496 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1497 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1498 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1499 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1500 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1501 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1502 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1503 interrupt-names = "error", 1504 "ch0", "ch1", "ch2", "ch3", 1505 "ch4", "ch5", "ch6", "ch7", 1506 "ch8", "ch9", "ch10", "ch11", 1507 "ch12", "ch13", "ch14", "ch15"; 1508 clocks = <&cpg CPG_MOD 502>; 1509 clock-names = "fck"; 1510 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1511 resets = <&cpg 502>; 1512 #dma-cells = <1>; 1513 dma-channels = <16>; 1514 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1515 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1516 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1517 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1518 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1519 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1520 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1521 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1522 }; 1523 1524 xhci0: usb@ee000000 { 1525 compatible = "renesas,xhci-r8a77990", 1526 "renesas,rcar-gen3-xhci"; 1527 reg = <0 0xee000000 0 0xc00>; 1528 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1529 clocks = <&cpg CPG_MOD 328>; 1530 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1531 resets = <&cpg 328>; 1532 status = "disabled"; 1533 }; 1534 1535 usb3_peri0: usb@ee020000 { 1536 compatible = "renesas,r8a77990-usb3-peri", 1537 "renesas,rcar-gen3-usb3-peri"; 1538 reg = <0 0xee020000 0 0x400>; 1539 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1540 clocks = <&cpg CPG_MOD 328>; 1541 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1542 resets = <&cpg 328>; 1543 status = "disabled"; 1544 }; 1545 1546 ohci0: usb@ee080000 { 1547 compatible = "generic-ohci"; 1548 reg = <0 0xee080000 0 0x100>; 1549 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1550 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1551 phys = <&usb2_phy0 1>; 1552 phy-names = "usb"; 1553 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1554 resets = <&cpg 703>, <&cpg 704>; 1555 status = "disabled"; 1556 }; 1557 1558 ehci0: usb@ee080100 { 1559 compatible = "generic-ehci"; 1560 reg = <0 0xee080100 0 0x100>; 1561 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1562 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1563 phys = <&usb2_phy0 2>; 1564 phy-names = "usb"; 1565 companion = <&ohci0>; 1566 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1567 resets = <&cpg 703>, <&cpg 704>; 1568 status = "disabled"; 1569 }; 1570 1571 usb2_phy0: usb-phy@ee080200 { 1572 compatible = "renesas,usb2-phy-r8a77990", 1573 "renesas,rcar-gen3-usb2-phy"; 1574 reg = <0 0xee080200 0 0x700>; 1575 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1576 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1577 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1578 resets = <&cpg 703>, <&cpg 704>; 1579 #phy-cells = <1>; 1580 status = "disabled"; 1581 }; 1582 1583 sdhi0: sd@ee100000 { 1584 compatible = "renesas,sdhi-r8a77990", 1585 "renesas,rcar-gen3-sdhi"; 1586 reg = <0 0xee100000 0 0x2000>; 1587 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1588 clocks = <&cpg CPG_MOD 314>; 1589 max-frequency = <200000000>; 1590 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1591 resets = <&cpg 314>; 1592 iommus = <&ipmmu_ds1 32>; 1593 status = "disabled"; 1594 }; 1595 1596 sdhi1: sd@ee120000 { 1597 compatible = "renesas,sdhi-r8a77990", 1598 "renesas,rcar-gen3-sdhi"; 1599 reg = <0 0xee120000 0 0x2000>; 1600 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1601 clocks = <&cpg CPG_MOD 313>; 1602 max-frequency = <200000000>; 1603 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1604 resets = <&cpg 313>; 1605 iommus = <&ipmmu_ds1 33>; 1606 status = "disabled"; 1607 }; 1608 1609 sdhi3: sd@ee160000 { 1610 compatible = "renesas,sdhi-r8a77990", 1611 "renesas,rcar-gen3-sdhi"; 1612 reg = <0 0xee160000 0 0x2000>; 1613 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1614 clocks = <&cpg CPG_MOD 311>; 1615 max-frequency = <200000000>; 1616 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1617 resets = <&cpg 311>; 1618 iommus = <&ipmmu_ds1 35>; 1619 status = "disabled"; 1620 }; 1621 1622 gic: interrupt-controller@f1010000 { 1623 compatible = "arm,gic-400"; 1624 #interrupt-cells = <3>; 1625 #address-cells = <0>; 1626 interrupt-controller; 1627 reg = <0x0 0xf1010000 0 0x1000>, 1628 <0x0 0xf1020000 0 0x20000>, 1629 <0x0 0xf1040000 0 0x20000>, 1630 <0x0 0xf1060000 0 0x20000>; 1631 interrupts = <GIC_PPI 9 1632 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1633 clocks = <&cpg CPG_MOD 408>; 1634 clock-names = "clk"; 1635 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1636 resets = <&cpg 408>; 1637 }; 1638 1639 pciec0: pcie@fe000000 { 1640 compatible = "renesas,pcie-r8a77990", 1641 "renesas,pcie-rcar-gen3"; 1642 reg = <0 0xfe000000 0 0x80000>; 1643 #address-cells = <3>; 1644 #size-cells = <2>; 1645 bus-range = <0x00 0xff>; 1646 device_type = "pci"; 1647 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1648 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1649 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1650 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1651 /* Map all possible DDR as inbound ranges */ 1652 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1653 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1654 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1655 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1656 #interrupt-cells = <1>; 1657 interrupt-map-mask = <0 0 0 0>; 1658 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1659 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1660 clock-names = "pcie", "pcie_bus"; 1661 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1662 resets = <&cpg 319>; 1663 status = "disabled"; 1664 }; 1665 1666 vspb0: vsp@fe960000 { 1667 compatible = "renesas,vsp2"; 1668 reg = <0 0xfe960000 0 0x8000>; 1669 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1670 clocks = <&cpg CPG_MOD 626>; 1671 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1672 resets = <&cpg 626>; 1673 renesas,fcp = <&fcpvb0>; 1674 }; 1675 1676 fcpvb0: fcp@fe96f000 { 1677 compatible = "renesas,fcpv"; 1678 reg = <0 0xfe96f000 0 0x200>; 1679 clocks = <&cpg CPG_MOD 607>; 1680 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1681 resets = <&cpg 607>; 1682 iommus = <&ipmmu_vp0 5>; 1683 }; 1684 1685 vspi0: vsp@fe9a0000 { 1686 compatible = "renesas,vsp2"; 1687 reg = <0 0xfe9a0000 0 0x8000>; 1688 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1689 clocks = <&cpg CPG_MOD 631>; 1690 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1691 resets = <&cpg 631>; 1692 renesas,fcp = <&fcpvi0>; 1693 }; 1694 1695 fcpvi0: fcp@fe9af000 { 1696 compatible = "renesas,fcpv"; 1697 reg = <0 0xfe9af000 0 0x200>; 1698 clocks = <&cpg CPG_MOD 611>; 1699 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1700 resets = <&cpg 611>; 1701 iommus = <&ipmmu_vp0 8>; 1702 }; 1703 1704 vspd0: vsp@fea20000 { 1705 compatible = "renesas,vsp2"; 1706 reg = <0 0xfea20000 0 0x7000>; 1707 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1708 clocks = <&cpg CPG_MOD 623>; 1709 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1710 resets = <&cpg 623>; 1711 renesas,fcp = <&fcpvd0>; 1712 }; 1713 1714 fcpvd0: fcp@fea27000 { 1715 compatible = "renesas,fcpv"; 1716 reg = <0 0xfea27000 0 0x200>; 1717 clocks = <&cpg CPG_MOD 603>; 1718 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1719 resets = <&cpg 603>; 1720 iommus = <&ipmmu_vi0 8>; 1721 }; 1722 1723 vspd1: vsp@fea28000 { 1724 compatible = "renesas,vsp2"; 1725 reg = <0 0xfea28000 0 0x7000>; 1726 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1727 clocks = <&cpg CPG_MOD 622>; 1728 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1729 resets = <&cpg 622>; 1730 renesas,fcp = <&fcpvd1>; 1731 }; 1732 1733 fcpvd1: fcp@fea2f000 { 1734 compatible = "renesas,fcpv"; 1735 reg = <0 0xfea2f000 0 0x200>; 1736 clocks = <&cpg CPG_MOD 602>; 1737 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1738 resets = <&cpg 602>; 1739 iommus = <&ipmmu_vi0 9>; 1740 }; 1741 1742 cmm0: cmm@fea40000 { 1743 compatible = "renesas,r8a77990-cmm", 1744 "renesas,rcar-gen3-cmm"; 1745 reg = <0 0xfea40000 0 0x1000>; 1746 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1747 clocks = <&cpg CPG_MOD 711>; 1748 resets = <&cpg 711>; 1749 }; 1750 1751 cmm1: cmm@fea50000 { 1752 compatible = "renesas,r8a77990-cmm", 1753 "renesas,rcar-gen3-cmm"; 1754 reg = <0 0xfea50000 0 0x1000>; 1755 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1756 clocks = <&cpg CPG_MOD 710>; 1757 resets = <&cpg 710>; 1758 }; 1759 1760 csi40: csi2@feaa0000 { 1761 compatible = "renesas,r8a77990-csi2"; 1762 reg = <0 0xfeaa0000 0 0x10000>; 1763 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1764 clocks = <&cpg CPG_MOD 716>; 1765 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1766 resets = <&cpg 716>; 1767 status = "disabled"; 1768 1769 ports { 1770 #address-cells = <1>; 1771 #size-cells = <0>; 1772 1773 port@1 { 1774 #address-cells = <1>; 1775 #size-cells = <0>; 1776 1777 reg = <1>; 1778 1779 csi40vin4: endpoint@0 { 1780 reg = <0>; 1781 remote-endpoint = <&vin4csi40>; 1782 }; 1783 csi40vin5: endpoint@1 { 1784 reg = <1>; 1785 remote-endpoint = <&vin5csi40>; 1786 }; 1787 }; 1788 }; 1789 }; 1790 1791 du: display@feb00000 { 1792 compatible = "renesas,du-r8a77990"; 1793 reg = <0 0xfeb00000 0 0x40000>; 1794 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1795 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1796 clocks = <&cpg CPG_MOD 724>, 1797 <&cpg CPG_MOD 723>; 1798 clock-names = "du.0", "du.1"; 1799 resets = <&cpg 724>; 1800 reset-names = "du.0"; 1801 1802 renesas,cmms = <&cmm0>, <&cmm1>; 1803 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 1804 1805 status = "disabled"; 1806 1807 ports { 1808 #address-cells = <1>; 1809 #size-cells = <0>; 1810 1811 port@0 { 1812 reg = <0>; 1813 du_out_rgb: endpoint { 1814 }; 1815 }; 1816 1817 port@1 { 1818 reg = <1>; 1819 du_out_lvds0: endpoint { 1820 remote-endpoint = <&lvds0_in>; 1821 }; 1822 }; 1823 1824 port@2 { 1825 reg = <2>; 1826 du_out_lvds1: endpoint { 1827 remote-endpoint = <&lvds1_in>; 1828 }; 1829 }; 1830 }; 1831 }; 1832 1833 lvds0: lvds-encoder@feb90000 { 1834 compatible = "renesas,r8a77990-lvds"; 1835 reg = <0 0xfeb90000 0 0x20>; 1836 clocks = <&cpg CPG_MOD 727>; 1837 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1838 resets = <&cpg 727>; 1839 status = "disabled"; 1840 1841 renesas,companion = <&lvds1>; 1842 1843 ports { 1844 #address-cells = <1>; 1845 #size-cells = <0>; 1846 1847 port@0 { 1848 reg = <0>; 1849 lvds0_in: endpoint { 1850 remote-endpoint = <&du_out_lvds0>; 1851 }; 1852 }; 1853 1854 port@1 { 1855 reg = <1>; 1856 lvds0_out: endpoint { 1857 }; 1858 }; 1859 }; 1860 }; 1861 1862 lvds1: lvds-encoder@feb90100 { 1863 compatible = "renesas,r8a77990-lvds"; 1864 reg = <0 0xfeb90100 0 0x20>; 1865 clocks = <&cpg CPG_MOD 727>; 1866 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1867 resets = <&cpg 726>; 1868 status = "disabled"; 1869 1870 ports { 1871 #address-cells = <1>; 1872 #size-cells = <0>; 1873 1874 port@0 { 1875 reg = <0>; 1876 lvds1_in: endpoint { 1877 remote-endpoint = <&du_out_lvds1>; 1878 }; 1879 }; 1880 1881 port@1 { 1882 reg = <1>; 1883 lvds1_out: endpoint { 1884 }; 1885 }; 1886 }; 1887 }; 1888 1889 prr: chipid@fff00044 { 1890 compatible = "renesas,prr"; 1891 reg = <0 0xfff00044 0 4>; 1892 }; 1893 }; 1894 1895 thermal-zones { 1896 cpu-thermal { 1897 polling-delay-passive = <250>; 1898 polling-delay = <0>; 1899 thermal-sensors = <&thermal 0>; 1900 sustainable-power = <717>; 1901 1902 cooling-maps { 1903 map0 { 1904 trip = <&target>; 1905 cooling-device = <&a53_0 0 2>; 1906 contribution = <1024>; 1907 }; 1908 }; 1909 1910 trips { 1911 sensor1_crit: sensor1-crit { 1912 temperature = <120000>; 1913 hysteresis = <2000>; 1914 type = "critical"; 1915 }; 1916 1917 target: trip-point1 { 1918 temperature = <100000>; 1919 hysteresis = <2000>; 1920 type = "passive"; 1921 }; 1922 }; 1923 }; 1924 }; 1925 1926 timer { 1927 compatible = "arm,armv8-timer"; 1928 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1929 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1930 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1931 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1932 }; 1933}; 1934