r8a77980.dtsi (de625477c632abecf23feba94ff4c5904764f57d) r8a77980.dtsi (69c5e602d0bd717da04c18c08017d195ec10da8d)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

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325 };
326
327 sysc: system-controller@e6180000 {
328 compatible = "renesas,r8a77980-sysc";
329 reg = <0 0xe6180000 0 0x440>;
330 #power-domain-cells = <1>;
331 };
332
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

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325 };
326
327 sysc: system-controller@e6180000 {
328 compatible = "renesas,r8a77980-sysc";
329 reg = <0 0xe6180000 0 0x440>;
330 #power-domain-cells = <1>;
331 };
332
333 tsc: thermal@e6198000 {
334 compatible = "renesas,r8a77980-thermal";
335 reg = <0 0xe6198000 0 0x100>,
336 <0 0xe61a0000 0 0x100>;
337 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
338 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
339 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
340 clocks = <&cpg CPG_MOD 522>;
341 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
342 resets = <&cpg 522>;
343 #thermal-sensor-cells = <1>;
344 };
345
333 intc_ex: interrupt-controller@e61c0000 {
334 compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
335 #interrupt-cells = <2>;
336 interrupt-controller;
337 reg = <0 0xe61c0000 0 0x200>;
338 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
339 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
340 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH

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1399 };
1400
1401 prr: chipid@fff00044 {
1402 compatible = "renesas,prr";
1403 reg = <0 0xfff00044 0 4>;
1404 };
1405 };
1406
346 intc_ex: interrupt-controller@e61c0000 {
347 compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
348 #interrupt-cells = <2>;
349 interrupt-controller;
350 reg = <0 0xe61c0000 0 0x200>;
351 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
352 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
353 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH

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1412 };
1413
1414 prr: chipid@fff00044 {
1415 compatible = "renesas,prr";
1416 reg = <0 0xfff00044 0 4>;
1417 };
1418 };
1419
1420 thermal-zones {
1421 thermal-sensor-1 {
1422 polling-delay-passive = <250>;
1423 polling-delay = <1000>;
1424 thermal-sensors = <&tsc 0>;
1425
1426 trips {
1427 sensor1-passive {
1428 temperature = <95000>;
1429 hysteresis = <1000>;
1430 type = "passive";
1431 };
1432 sensor1-critical {
1433 temperature = <120000>;
1434 hysteresis = <1000>;
1435 type = "critical";
1436 };
1437 };
1438 };
1439
1440 thermal-sensor-2 {
1441 polling-delay-passive = <250>;
1442 polling-delay = <1000>;
1443 thermal-sensors = <&tsc 1>;
1444
1445 trips {
1446 sensor2-passive {
1447 temperature = <95000>;
1448 hysteresis = <1000>;
1449 type = "passive";
1450 };
1451 sensor2-critical {
1452 temperature = <120000>;
1453 hysteresis = <1000>;
1454 type = "critical";
1455 };
1456 };
1457 };
1458 };
1459
1407 timer {
1408 compatible = "arm,armv8-timer";
1409 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
1410 IRQ_TYPE_LEVEL_LOW)>,
1411 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
1412 IRQ_TYPE_LEVEL_LOW)>,
1413 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
1414 IRQ_TYPE_LEVEL_LOW)>,
1415 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
1416 IRQ_TYPE_LEVEL_LOW)>;
1417 };
1418};
1460 timer {
1461 compatible = "arm,armv8-timer";
1462 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
1463 IRQ_TYPE_LEVEL_LOW)>,
1464 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
1465 IRQ_TYPE_LEVEL_LOW)>,
1466 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
1467 IRQ_TYPE_LEVEL_LOW)>,
1468 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
1469 IRQ_TYPE_LEVEL_LOW)>;
1470 };
1471};