r8a77980.dtsi (2ec1e4b4a815ee872fb29753f4872abf1a2e62a4) r8a77980.dtsi (87bea6780b952dac7f58ed2395d2eaa434deb0fb)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a77980 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

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412 clocks = <&cpg CPG_MOD 217>;
413 clock-names = "fck";
414 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
415 resets = <&cpg 217>;
416 #dma-cells = <1>;
417 dma-channels = <16>;
418 };
419
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a77980 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

--- 403 unchanged lines hidden (view full) ---

412 clocks = <&cpg CPG_MOD 217>;
413 clock-names = "fck";
414 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
415 resets = <&cpg 217>;
416 #dma-cells = <1>;
417 dma-channels = <16>;
418 };
419
420 gether: ethernet@e7400000 {
421 compatible = "renesas,gether-r8a77980";
422 reg = <0 0xe7400000 0 0x1000>;
423 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 813>;
425 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
426 resets = <&cpg 813>;
427 #address-cells = <1>;
428 #size-cells = <0>;
429 status = "disabled";
430 };
431
420 mmc0: mmc@ee140000 {
421 compatible = "renesas,sdhi-r8a77980",
422 "renesas,rcar-gen3-sdhi";
423 reg = <0 0xee140000 0 0x2000>;
424 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
425 clocks = <&cpg CPG_MOD 314>;
426 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
427 resets = <&cpg 314>;

--- 39 unchanged lines hidden --- 		432 mmc0: mmc@ee140000 {
433 compatible = "renesas,sdhi-r8a77980",
434 "renesas,rcar-gen3-sdhi";
435 reg = <0 0xee140000 0 0x2000>;
436 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
437 clocks = <&cpg CPG_MOD 314>;
438 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
439 resets = <&cpg 314>;

--- 39 unchanged lines hidden ---