r8a774e1.dtsi (d18dbce4e8c02634866dc80c7873e6121fcae970) r8a774e1.dtsi (6dd733679911598354b0445f07a3e6c3141c865c)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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437 };
438
439 sysc: system-controller@e6180000 {
440 compatible = "renesas,r8a774e1-sysc";
441 reg = <0 0xe6180000 0 0x0400>;
442 #power-domain-cells = <1>;
443 };
444
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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437 };
438
439 sysc: system-controller@e6180000 {
440 compatible = "renesas,r8a774e1-sysc";
441 reg = <0 0xe6180000 0 0x0400>;
442 #power-domain-cells = <1>;
443 };
444
445 tsc: thermal@e6198000 {
446 compatible = "renesas,r8a774e1-thermal";
447 reg = <0 0xe6198000 0 0x100>,
448 <0 0xe61a0000 0 0x100>,
449 <0 0xe61a8000 0 0x100>;
450 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
451 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
452 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
453 clocks = <&cpg CPG_MOD 522>;
454 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
455 resets = <&cpg 522>;
456 #thermal-sensor-cells = <1>;
457 };
458
445 intc_ex: interrupt-controller@e61c0000 {
446 compatible = "renesas,intc-ex-r8a774e1", "renesas,irqc";
447 #interrupt-cells = <2>;
448 interrupt-controller;
449 reg = <0 0xe61c0000 0 0x200>;
450 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
451 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
452 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,

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998 };
999
1000 prr: chipid@fff00044 {
1001 compatible = "renesas,prr";
1002 reg = <0 0xfff00044 0 4>;
1003 };
1004 };
1005
459 intc_ex: interrupt-controller@e61c0000 {
460 compatible = "renesas,intc-ex-r8a774e1", "renesas,irqc";
461 #interrupt-cells = <2>;
462 interrupt-controller;
463 reg = <0 0xe61c0000 0 0x200>;
464 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
465 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
466 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,

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1012 };
1013
1014 prr: chipid@fff00044 {
1015 compatible = "renesas,prr";
1016 reg = <0 0xfff00044 0 4>;
1017 };
1018 };
1019
1020 thermal-zones {
1021 sensor_thermal1: sensor-thermal1 {
1022 polling-delay-passive = <250>;
1023 polling-delay = <1000>;
1024 thermal-sensors = <&tsc 0>;
1025 sustainable-power = <6313>;
1026
1027 trips {
1028 sensor1_crit: sensor1-crit {
1029 temperature = <120000>;
1030 hysteresis = <1000>;
1031 type = "critical";
1032 };
1033 };
1034 };
1035
1036 sensor_thermal2: sensor-thermal2 {
1037 polling-delay-passive = <250>;
1038 polling-delay = <1000>;
1039 thermal-sensors = <&tsc 1>;
1040 sustainable-power = <6313>;
1041
1042 trips {
1043 sensor2_crit: sensor2-crit {
1044 temperature = <120000>;
1045 hysteresis = <1000>;
1046 type = "critical";
1047 };
1048 };
1049 };
1050
1051 sensor_thermal3: sensor-thermal3 {
1052 polling-delay-passive = <250>;
1053 polling-delay = <1000>;
1054 thermal-sensors = <&tsc 2>;
1055 sustainable-power = <6313>;
1056
1057 trips {
1058 target: trip-point1 {
1059 temperature = <100000>;
1060 hysteresis = <1000>;
1061 type = "passive";
1062 };
1063
1064 sensor3_crit: sensor3-crit {
1065 temperature = <120000>;
1066 hysteresis = <1000>;
1067 type = "critical";
1068 };
1069 };
1070
1071 cooling-maps {
1072 map0 {
1073 trip = <&target>;
1074 cooling-device = <&a57_0 0 2>;
1075 contribution = <1024>;
1076 };
1077
1078 map1 {
1079 trip = <&target>;
1080 cooling-device = <&a53_0 0 2>;
1081 contribution = <1024>;
1082 };
1083 };
1084 };
1085 };
1086
1006 timer {
1007 compatible = "arm,armv8-timer";
1008 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1009 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1010 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1011 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
1012 };
1013

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1087 timer {
1088 compatible = "arm,armv8-timer";
1089 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1090 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1091 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1092 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
1093 };
1094

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