r8a774e1.dtsi (b9b491a70402f21eb47c10910438c9e0d10a0e17) | r8a774e1.dtsi (31941342888d4fa008fb27cef9d4ae5913df8792) |
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1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a774e1 SoC 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> --- 1205 unchanged lines hidden (view full) --- 1214 usb2_phy1: usb-phy@ee0a0200 { 1215 reg = <0 0xee0a0200 0 0x700>; 1216 status = "disabled"; 1217 1218 /* placeholder */ 1219 }; 1220 1221 sdhi0: mmc@ee100000 { | 1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a774e1 SoC 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> --- 1205 unchanged lines hidden (view full) --- 1214 usb2_phy1: usb-phy@ee0a0200 { 1215 reg = <0 0xee0a0200 0 0x700>; 1216 status = "disabled"; 1217 1218 /* placeholder */ 1219 }; 1220 1221 sdhi0: mmc@ee100000 { |
1222 compatible = "renesas,sdhi-r8a774e1", 1223 "renesas,rcar-gen3-sdhi"; |
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1222 reg = <0 0xee100000 0 0x2000>; | 1224 reg = <0 0xee100000 0 0x2000>; |
1225 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1226 clocks = <&cpg CPG_MOD 314>; 1227 max-frequency = <200000000>; 1228 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1229 resets = <&cpg 314>; 1230 iommus = <&ipmmu_ds1 32>; |
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1223 status = "disabled"; | 1231 status = "disabled"; |
1232 }; |
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1224 | 1233 |
1225 /* placeholder */ | 1234 sdhi1: mmc@ee120000 { 1235 compatible = "renesas,sdhi-r8a774e1", 1236 "renesas,rcar-gen3-sdhi"; 1237 reg = <0 0xee120000 0 0x2000>; 1238 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1239 clocks = <&cpg CPG_MOD 313>; 1240 max-frequency = <200000000>; 1241 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1242 resets = <&cpg 313>; 1243 iommus = <&ipmmu_ds1 33>; 1244 status = "disabled"; |
1226 }; 1227 1228 sdhi2: mmc@ee140000 { | 1245 }; 1246 1247 sdhi2: mmc@ee140000 { |
1248 compatible = "renesas,sdhi-r8a774e1", 1249 "renesas,rcar-gen3-sdhi"; |
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1229 reg = <0 0xee140000 0 0x2000>; | 1250 reg = <0 0xee140000 0 0x2000>; |
1251 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1252 clocks = <&cpg CPG_MOD 312>; 1253 max-frequency = <200000000>; 1254 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1255 resets = <&cpg 312>; 1256 iommus = <&ipmmu_ds1 34>; |
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1230 status = "disabled"; | 1257 status = "disabled"; |
1231 1232 /* placeholder */ | |
1233 }; 1234 1235 sdhi3: mmc@ee160000 { 1236 compatible = "renesas,sdhi-r8a774e1", 1237 "renesas,rcar-gen3-sdhi"; 1238 reg = <0 0xee160000 0 0x2000>; 1239 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1240 clocks = <&cpg CPG_MOD 311>; 1241 max-frequency = <200000000>; 1242 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1243 resets = <&cpg 311>; | 1258 }; 1259 1260 sdhi3: mmc@ee160000 { 1261 compatible = "renesas,sdhi-r8a774e1", 1262 "renesas,rcar-gen3-sdhi"; 1263 reg = <0 0xee160000 0 0x2000>; 1264 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1265 clocks = <&cpg CPG_MOD 311>; 1266 max-frequency = <200000000>; 1267 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1268 resets = <&cpg 311>; |
1269 iommus = <&ipmmu_ds1 35>; |
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1244 status = "disabled"; 1245 }; 1246 1247 gic: interrupt-controller@f1010000 { 1248 compatible = "arm,gic-400"; 1249 #interrupt-cells = <3>; 1250 #address-cells = <0>; 1251 interrupt-controller; --- 158 unchanged lines hidden --- | 1270 status = "disabled"; 1271 }; 1272 1273 gic: interrupt-controller@f1010000 { 1274 compatible = "arm,gic-400"; 1275 #interrupt-cells = <3>; 1276 #address-cells = <0>; 1277 interrupt-controller; --- 158 unchanged lines hidden --- |