r8a774e1.dtsi (912d3c5383f7a68b1293aaaa378b9c3373e48a91) r8a774e1.dtsi (b7ecb51b2d9bd12c80c24d2fd1cadedd35e7cb7e)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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2463 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2464 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2465 clock-names = "pcie", "pcie_bus";
2466 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2467 resets = <&cpg 318>;
2468 status = "disabled";
2469 };
2470
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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2463 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2464 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2465 clock-names = "pcie", "pcie_bus";
2466 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2467 resets = <&cpg 318>;
2468 status = "disabled";
2469 };
2470
2471 pciec0_ep: pcie-ep@fe000000 {
2472 compatible = "renesas,r8a774e1-pcie-ep",
2473 "renesas,rcar-gen3-pcie-ep";
2474 reg = <0x0 0xfe000000 0 0x80000>,
2475 <0x0 0xfe100000 0 0x100000>,
2476 <0x0 0xfe200000 0 0x200000>,
2477 <0x0 0x30000000 0 0x8000000>,
2478 <0x0 0x38000000 0 0x8000000>;
2479 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2480 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2481 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2482 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2483 clocks = <&cpg CPG_MOD 319>;
2484 clock-names = "pcie";
2485 resets = <&cpg 319>;
2486 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2487 status = "disabled";
2488 };
2489
2490 pciec1_ep: pcie-ep@ee800000 {
2491 compatible = "renesas,r8a774e1-pcie-ep",
2492 "renesas,rcar-gen3-pcie-ep";
2493 reg = <0x0 0xee800000 0 0x80000>,
2494 <0x0 0xee900000 0 0x100000>,
2495 <0x0 0xeea00000 0 0x200000>,
2496 <0x0 0xc0000000 0 0x8000000>,
2497 <0x0 0xc8000000 0 0x8000000>;
2498 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2499 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2500 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2501 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2502 clocks = <&cpg CPG_MOD 318>;
2503 clock-names = "pcie";
2504 resets = <&cpg 318>;
2505 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2506 status = "disabled";
2507 };
2508
2471 vspbc: vsp@fe920000 {
2472 compatible = "renesas,vsp2";
2473 reg = <0 0xfe920000 0 0x8000>;
2474 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2475 clocks = <&cpg CPG_MOD 624>;
2476 power-domains = <&sysc R8A774E1_PD_A3VP>;
2477 resets = <&cpg 624>;
2478

--- 428 unchanged lines hidden --- 		2509 vspbc: vsp@fe920000 {
2510 compatible = "renesas,vsp2";
2511 reg = <0 0xfe920000 0 0x8000>;
2512 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2513 clocks = <&cpg CPG_MOD 624>;
2514 power-domains = <&sysc R8A774E1_PD_A3VP>;
2515 resets = <&cpg 624>;
2516

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