r8a774e1.dtsi (31941342888d4fa008fb27cef9d4ae5913df8792) r8a774e1.dtsi (950a3a7951cdeb908798a49d57e5303ad7afd05a)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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602 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
603 clocks = <&cpg CPG_MOD 121>;
604 clock-names = "fck";
605 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
606 resets = <&cpg 121>;
607 status = "disabled";
608 };
609
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774e1 SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>

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602 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
603 clocks = <&cpg CPG_MOD 121>;
604 clock-names = "fck";
605 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
606 resets = <&cpg 121>;
607 status = "disabled";
608 };
609
610 i2c0: i2c@e6500000 {
611 #address-cells = <1>;
612 #size-cells = <0>;
613 compatible = "renesas,i2c-r8a774e1",
614 "renesas,rcar-gen3-i2c";
615 reg = <0 0xe6500000 0 0x40>;
616 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
617 clocks = <&cpg CPG_MOD 931>;
618 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
619 resets = <&cpg 931>;
620 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
621 <&dmac2 0x91>, <&dmac2 0x90>;
622 dma-names = "tx", "rx", "tx", "rx";
623 i2c-scl-internal-delay-ns = <110>;
624 status = "disabled";
625 };
626
627 i2c1: i2c@e6508000 {
628 #address-cells = <1>;
629 #size-cells = <0>;
630 compatible = "renesas,i2c-r8a774e1",
631 "renesas,rcar-gen3-i2c";
632 reg = <0 0xe6508000 0 0x40>;
633 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
634 clocks = <&cpg CPG_MOD 930>;
635 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
636 resets = <&cpg 930>;
637 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
638 <&dmac2 0x93>, <&dmac2 0x92>;
639 dma-names = "tx", "rx", "tx", "rx";
640 i2c-scl-internal-delay-ns = <6>;
641 status = "disabled";
642 };
643
610 i2c2: i2c@e6510000 {
644 i2c2: i2c@e6510000 {
611 reg = <0 0xe6510000 0 0x40>;
612 #address-cells = <1>;
613 #size-cells = <0>;
645 #address-cells = <1>;
646 #size-cells = <0>;
647 compatible = "renesas,i2c-r8a774e1",
648 "renesas,rcar-gen3-i2c";
649 reg = <0 0xe6510000 0 0x40>;
650 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
651 clocks = <&cpg CPG_MOD 929>;
652 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
653 resets = <&cpg 929>;
654 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
655 <&dmac2 0x95>, <&dmac2 0x94>;
656 dma-names = "tx", "rx", "tx", "rx";
657 i2c-scl-internal-delay-ns = <6>;
614 status = "disabled";
658 status = "disabled";
659 };
615
660
616 /* placeholder */
661 i2c3: i2c@e66d0000 {
662 #address-cells = <1>;
663 #size-cells = <0>;
664 compatible = "renesas,i2c-r8a774e1",
665 "renesas,rcar-gen3-i2c";
666 reg = <0 0xe66d0000 0 0x40>;
667 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
668 clocks = <&cpg CPG_MOD 928>;
669 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
670 resets = <&cpg 928>;
671 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
672 dma-names = "tx", "rx";
673 i2c-scl-internal-delay-ns = <110>;
674 status = "disabled";
617 };
618
619 i2c4: i2c@e66d8000 {
620 #address-cells = <1>;
621 #size-cells = <0>;
675 };
676
677 i2c4: i2c@e66d8000 {
678 #address-cells = <1>;
679 #size-cells = <0>;
680 compatible = "renesas,i2c-r8a774e1",
681 "renesas,rcar-gen3-i2c";
622 reg = <0 0xe66d8000 0 0x40>;
682 reg = <0 0xe66d8000 0 0x40>;
683 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
684 clocks = <&cpg CPG_MOD 927>;
685 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
686 resets = <&cpg 927>;
687 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
688 dma-names = "tx", "rx";
689 i2c-scl-internal-delay-ns = <110>;
623 status = "disabled";
690 status = "disabled";
691 };
624
692
625 /* placeholder */
693 i2c5: i2c@e66e0000 {
694 #address-cells = <1>;
695 #size-cells = <0>;
696 compatible = "renesas,i2c-r8a774e1",
697 "renesas,rcar-gen3-i2c";
698 reg = <0 0xe66e0000 0 0x40>;
699 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
700 clocks = <&cpg CPG_MOD 919>;
701 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
702 resets = <&cpg 919>;
703 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
704 dma-names = "tx", "rx";
705 i2c-scl-internal-delay-ns = <110>;
706 status = "disabled";
626 };
627
707 };
708
709 i2c6: i2c@e66e8000 {
710 #address-cells = <1>;
711 #size-cells = <0>;
712 compatible = "renesas,i2c-r8a774e1",
713 "renesas,rcar-gen3-i2c";
714 reg = <0 0xe66e8000 0 0x40>;
715 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
716 clocks = <&cpg CPG_MOD 918>;
717 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
718 resets = <&cpg 918>;
719 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
720 dma-names = "tx", "rx";
721 i2c-scl-internal-delay-ns = <6>;
722 status = "disabled";
723 };
724
725 i2c_dvfs: i2c@e60b0000 {
726 #address-cells = <1>;
727 #size-cells = <0>;
728 compatible = "renesas,iic-r8a774e1",
729 "renesas,rcar-gen3-iic",
730 "renesas,rmobile-iic";
731 reg = <0 0xe60b0000 0 0x425>;
732 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
733 clocks = <&cpg CPG_MOD 926>;
734 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
735 resets = <&cpg 926>;
736 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
737 dma-names = "tx", "rx";
738 status = "disabled";
739 };
740
628 hscif0: serial@e6540000 {
629 compatible = "renesas,hscif-r8a774e1",
630 "renesas,rcar-gen3-hscif",
631 "renesas,hscif";
632 reg = <0 0xe6540000 0 0x60>;
633 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
634 clocks = <&cpg CPG_MOD 520>,
635 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,

--- 800 unchanged lines hidden --- 		741 hscif0: serial@e6540000 {
742 compatible = "renesas,hscif-r8a774e1",
743 "renesas,rcar-gen3-hscif",
744 "renesas,hscif";
745 reg = <0 0xe6540000 0 0x60>;
746 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
747 clocks = <&cpg CPG_MOD 520>,
748 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,

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