sm8350.dtsi (42ac0be18bfa09c03f52244f7c3e15c89b38532f) sm8350.dtsi (6bf150aef236fbb6d9fd299081fa8f1f0f6fde6f)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2020, Linaro Limited
4 */
5
6#include <dt-bindings/interconnect/qcom,sm8350.h>
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8#include <dt-bindings/clock/qcom,dispcc-sm8350.h>

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2307 "iface",
2308 "sleep",
2309 "mock_utmi";
2310
2311 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
2312 <&gcc GCC_USB30_PRIM_MASTER_CLK>;
2313 assigned-clock-rates = <19200000>, <200000000>;
2314
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2020, Linaro Limited
4 */
5
6#include <dt-bindings/interconnect/qcom,sm8350.h>
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8#include <dt-bindings/clock/qcom,dispcc-sm8350.h>

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2307 "iface",
2308 "sleep",
2309 "mock_utmi";
2310
2311 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
2312 <&gcc GCC_USB30_PRIM_MASTER_CLK>;
2313 assigned-clock-rates = <19200000>, <200000000>;
2314
2315 interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
2316 <&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
2315 interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
2316 <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
2317 <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
2317 <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
2318 <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
2318 <&pdc 14 IRQ_TYPE_EDGE_BOTH>;
2319 interrupt-names = "hs_phy_irq",
2320 "ss_phy_irq",
2319 <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
2320 interrupt-names = "pwr_event",
2321 "hs_phy_irq",
2322 "dp_hs_phy_irq",
2321 "dm_hs_phy_irq",
2323 "dm_hs_phy_irq",
2322 "dp_hs_phy_irq";
2324 "ss_phy_irq";
2323
2324 power-domains = <&gcc USB30_PRIM_GDSC>;
2325
2326 resets = <&gcc GCC_USB30_PRIM_BCR>;
2327
2328 interconnects = <&aggre1_noc MASTER_USB3_0 0 &mc_virt SLAVE_EBI1 0>,
2329 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
2330 interconnect-names = "usb-ddr", "apps-usb";

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2380 "sleep",
2381 "mock_utmi",
2382 "xo";
2383
2384 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
2385 <&gcc GCC_USB30_SEC_MASTER_CLK>;
2386 assigned-clock-rates = <19200000>, <200000000>;
2387
2325
2326 power-domains = <&gcc USB30_PRIM_GDSC>;
2327
2328 resets = <&gcc GCC_USB30_PRIM_BCR>;
2329
2330 interconnects = <&aggre1_noc MASTER_USB3_0 0 &mc_virt SLAVE_EBI1 0>,
2331 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
2332 interconnect-names = "usb-ddr", "apps-usb";

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2382 "sleep",
2383 "mock_utmi",
2384 "xo";
2385
2386 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
2387 <&gcc GCC_USB30_SEC_MASTER_CLK>;
2388 assigned-clock-rates = <19200000>, <200000000>;
2389
2388 interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
2389 <&pdc 16 IRQ_TYPE_LEVEL_HIGH>,
2390 interrupts-extended = <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
2391 <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
2392 <&pdc 12 IRQ_TYPE_EDGE_BOTH>,
2390 <&pdc 13 IRQ_TYPE_EDGE_BOTH>,
2393 <&pdc 13 IRQ_TYPE_EDGE_BOTH>,
2391 <&pdc 12 IRQ_TYPE_EDGE_BOTH>;
2392 interrupt-names = "hs_phy_irq",
2393 "ss_phy_irq",
2394 <&pdc 16 IRQ_TYPE_LEVEL_HIGH>;
2395 interrupt-names = "pwr_event",
2396 "hs_phy_irq",
2397 "dp_hs_phy_irq",
2394 "dm_hs_phy_irq",
2398 "dm_hs_phy_irq",
2395 "dp_hs_phy_irq";
2399 "ss_phy_irq";
2396
2397 power-domains = <&gcc USB30_SEC_GDSC>;
2398
2399 resets = <&gcc GCC_USB30_SEC_BCR>;
2400
2401 interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI1 0>,
2402 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
2403 interconnect-names = "usb-ddr", "apps-usb";

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2401 power-domains = <&gcc USB30_SEC_GDSC>;
2402
2403 resets = <&gcc GCC_USB30_SEC_BCR>;
2404
2405 interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI1 0>,
2406 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
2407 interconnect-names = "usb-ddr", "apps-usb";

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