mt8195.dtsi (936f9741a5f85a03bb109c84b63b3d225ca31465) mt8195.dtsi (cc4f0b13a887b483faa45084616998a21b63889d)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (c) 2021 MediaTek Inc.
4 * Author: Seiya Wang <seiya.wang@mediatek.com>
5 */
6
7/dts-v1/;
8#include <dt-bindings/clock/mt8195-clk.h>

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194
195 core2 {
196 cpu = <&cpu2>;
197 };
198
199 core3 {
200 cpu = <&cpu3>;
201 };
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (c) 2021 MediaTek Inc.
4 * Author: Seiya Wang <seiya.wang@mediatek.com>
5 */
6
7/dts-v1/;
8#include <dt-bindings/clock/mt8195-clk.h>

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194
195 core2 {
196 cpu = <&cpu2>;
197 };
198
199 core3 {
200 cpu = <&cpu3>;
201 };
202 };
203
202
204 cluster1 {
205 core0 {
203 core4 {
206 cpu = <&cpu4>;
207 };
208
204 cpu = <&cpu4>;
205 };
206
209 core1 {
207 core5 {
210 cpu = <&cpu5>;
211 };
212
208 cpu = <&cpu5>;
209 };
210
213 core2 {
211 core6 {
214 cpu = <&cpu6>;
215 };
216
212 cpu = <&cpu6>;
213 };
214
217 core3 {
215 core7 {
218 cpu = <&cpu7>;
219 };
220 };
221 };
222
223 idle-states {
224 entry-method = "psci";
225

--- 2425 unchanged lines hidden --- 		216 cpu = <&cpu7>;
217 };
218 };
219 };
220
221 idle-states {
222 entry-method = "psci";
223

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