hi6220.dtsi (b4b31a7cd797dcadba32a2f283923aec7583462e) hi6220.dtsi (8607357016f6b643787727cf35ecdcfb49c3cf23)
1/*
2 * dts file for Hisilicon Hi6220 SoC
3 *
4 * Copyright (C) 2015, Hisilicon Ltd.
5 */
6
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8#include <dt-bindings/clock/hi6220-clock.h>

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642 clock-names = "otg";
643 dr_mode = "otg";
644 g-use-dma;
645 g-rx-fifo-size = <512>;
646 g-np-tx-fifo-size = <128>;
647 g-tx-fifo-size = <128 128 128 128 128 128>;
648 interrupts = <0 77 0x4>;
649 };
1/*
2 * dts file for Hisilicon Hi6220 SoC
3 *
4 * Copyright (C) 2015, Hisilicon Ltd.
5 */
6
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8#include <dt-bindings/clock/hi6220-clock.h>

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642 clock-names = "otg";
643 dr_mode = "otg";
644 g-use-dma;
645 g-rx-fifo-size = <512>;
646 g-np-tx-fifo-size = <128>;
647 g-tx-fifo-size = <128 128 128 128 128 128>;
648 interrupts = <0 77 0x4>;
649 };
650
651 mailbox: mailbox@f7510000 {
652 compatible = "hisilicon,hi6220-mbox";
653 reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */
654 <0x0 0x06dff800 0x0 0x0800>; /* Mailbox buffer */
655 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
656 #mbox-cells = <3>;
657 };
650 };
651};
658 };
659};