pxa25x.c (c016550490687c6bdbcdf06c7b4d874b6c7c6e4e) pxa25x.c (16dfdbf038706c12c56f327d14c6b901edc376a3)
1/*
2 * linux/arch/arm/mach-pxa/pxa25x.c
3 *
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
7 *
8 * Code specific to PXA21x/25x/26x variants.

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137 INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
138};
139
140#ifdef CONFIG_PM
141
142#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
143#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
144
1/*
2 * linux/arch/arm/mach-pxa/pxa25x.c
3 *
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
7 *
8 * Code specific to PXA21x/25x/26x variants.

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137 INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
138};
139
140#ifdef CONFIG_PM
141
142#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
143#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
144
145#define RESTORE_GPLEVEL(n) do { \
146 GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
147 GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
148} while (0)
149
150/*
151 * List of global PXA peripheral registers to preserve.
152 * More ones like CP and general purpose register values are preserved
153 * with the stack pointer in sleep.S.
154 */
155enum { SLEEP_SAVE_START = 0,
156
145/*
146 * List of global PXA peripheral registers to preserve.
147 * More ones like CP and general purpose register values are preserved
148 * with the stack pointer in sleep.S.
149 */
150enum { SLEEP_SAVE_START = 0,
151
157 SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2,
158 SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2,
159 SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2,
160 SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2,
161 SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
162
163 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
164 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
165 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
166
167 SLEEP_SAVE_PSTR,
168
169 SLEEP_SAVE_CKEN,
170
171 SLEEP_SAVE_SIZE
172};
173
174
175static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
176{
152 SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
153
154 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
155 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
156 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
157
158 SLEEP_SAVE_PSTR,
159
160 SLEEP_SAVE_CKEN,
161
162 SLEEP_SAVE_SIZE
163};
164
165
166static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
167{
177 SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2);
178 SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
179 SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
180 SAVE(GFER0); SAVE(GFER1); SAVE(GFER2);
181 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
182
183 SAVE(GAFR0_L); SAVE(GAFR0_U);
184 SAVE(GAFR1_L); SAVE(GAFR1_U);
185 SAVE(GAFR2_L); SAVE(GAFR2_U);
186
187 SAVE(CKEN);
188 SAVE(PSTR);
189
190 /* Clear GPIO transition detect bits */
191 GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
192}
193
194static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
195{
196 /* ensure not to come back here if it wasn't intended */
197 PSPR = 0;
198
199 /* restore registers */
168 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
169
170 SAVE(GAFR0_L); SAVE(GAFR0_U);
171 SAVE(GAFR1_L); SAVE(GAFR1_U);
172 SAVE(GAFR2_L); SAVE(GAFR2_U);
173
174 SAVE(CKEN);
175 SAVE(PSTR);
176
177 /* Clear GPIO transition detect bits */
178 GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
179}
180
181static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
182{
183 /* ensure not to come back here if it wasn't intended */
184 PSPR = 0;
185
186 /* restore registers */
200 RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
201 RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
202 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
203 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
204 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
187 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
188 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
189 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
205 RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
206 RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
207 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
208
209 PSSR = PSSR_RDH | PSSR_PH;
210
211 RESTORE(CKEN);
212 RESTORE(PSTR);
213}
214

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297 &pxa25x_device_ssp,
298 &pxa25x_device_nssp,
299 &pxa25x_device_assp,
300};
301
302static struct sys_device pxa25x_sysdev[] = {
303 {
304 .cls = &pxa_irq_sysclass,
190 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
191
192 PSSR = PSSR_RDH | PSSR_PH;
193
194 RESTORE(CKEN);
195 RESTORE(PSTR);
196}
197

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280 &pxa25x_device_ssp,
281 &pxa25x_device_nssp,
282 &pxa25x_device_assp,
283};
284
285static struct sys_device pxa25x_sysdev[] = {
286 {
287 .cls = &pxa_irq_sysclass,
288 }, {
289 .cls = &pxa_gpio_sysclass,
305 },
306};
307
308static int __init pxa25x_init(void)
309{
310 int i, ret = 0;
311
312 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */

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290 },
291};
292
293static int __init pxa25x_init(void)
294{
295 int i, ret = 0;
296
297 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */

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