io.c (d5ef8a4d87ab21d575ac86366599c9152a28028d) io.c (2ec1fc4e169acc0b8d6733ff028fd52e766773d9)
1/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments
8 *

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302 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
303}
304#endif
305
306#ifdef CONFIG_ARCH_OMAP4
307void __init omap44xx_map_common_io(void)
308{
309 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
1/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments
8 *

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302 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
303}
304#endif
305
306#ifdef CONFIG_ARCH_OMAP4
307void __init omap44xx_map_common_io(void)
308{
309 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
310 omap_barriers_init();
310}
311#endif
312
313/*
314 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
315 *
316 * Sets the CORE DPLL3 M2 divider to the same value that it's at
317 * currently. This has the effect of setting the SDRC SDRAM AC timing

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383 postsetup_state = _HWMOD_STATE_DISABLED;
384 omap_hwmod_for_each_by_class("wd_timer",
385 _set_hwmod_postsetup_state,
386 &postsetup_state);
387
388 omap_pm_if_early_init();
389}
390
311}
312#endif
313
314/*
315 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
316 *
317 * Sets the CORE DPLL3 M2 divider to the same value that it's at
318 * currently. This has the effect of setting the SDRC SDRAM AC timing

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384 postsetup_state = _HWMOD_STATE_DISABLED;
385 omap_hwmod_for_each_by_class("wd_timer",
386 _set_hwmod_postsetup_state,
387 &postsetup_state);
388
389 omap_pm_if_early_init();
390}
391
391#ifdef CONFIG_SOC_OMAP2420
392#ifdef CONFIG_ARCH_OMAP2
392void __init omap2420_init_early(void)
393{
394 omap2_set_globals_242x();
395 omap_common_init_early();
396 omap2xxx_voltagedomains_init();
397 omap242x_powerdomains_init();
398 omap242x_clockdomains_init();
399 omap2420_hwmod_init();
400 omap_hwmod_init_postsetup();
401 omap2420_clk_init();
402}
393void __init omap2420_init_early(void)
394{
395 omap2_set_globals_242x();
396 omap_common_init_early();
397 omap2xxx_voltagedomains_init();
398 omap242x_powerdomains_init();
399 omap242x_clockdomains_init();
400 omap2420_hwmod_init();
401 omap_hwmod_init_postsetup();
402 omap2420_clk_init();
403}
403#endif
404
404
405#ifdef CONFIG_SOC_OMAP2430
406void __init omap2430_init_early(void)
407{
408 omap2_set_globals_243x();
409 omap_common_init_early();
410 omap2xxx_voltagedomains_init();
411 omap243x_powerdomains_init();
412 omap243x_clockdomains_init();
413 omap2430_hwmod_init();

--- 119 unchanged lines hidden --- 		405void __init omap2430_init_early(void)
406{
407 omap2_set_globals_243x();
408 omap_common_init_early();
409 omap2xxx_voltagedomains_init();
410 omap243x_powerdomains_init();
411 omap243x_clockdomains_init();
412 omap2430_hwmod_init();

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