head.S (91a9fec022f5d98835e27d5307d487da3798040c) | head.S (80c59dafb1a9a86fa996e6e34d06b60567c925ca) |
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1/* 2 * linux/arch/arm/kernel/head.S 3 * 4 * Copyright (C) 1994-2002 Russell King 5 * Copyright (c) 2003 ARM Limited 6 * All Rights Reserved 7 * 8 * This program is free software; you can redistribute it and/or modify --- 9 unchanged lines hidden (view full) --- 18#include <asm/cp15.h> 19#include <asm/domain.h> 20#include <asm/ptrace.h> 21#include <asm/asm-offsets.h> 22#include <asm/memory.h> 23#include <asm/thread_info.h> 24#include <asm/pgtable.h> 25 | 1/* 2 * linux/arch/arm/kernel/head.S 3 * 4 * Copyright (C) 1994-2002 Russell King 5 * Copyright (c) 2003 ARM Limited 6 * All Rights Reserved 7 * 8 * This program is free software; you can redistribute it and/or modify --- 9 unchanged lines hidden (view full) --- 18#include <asm/cp15.h> 19#include <asm/domain.h> 20#include <asm/ptrace.h> 21#include <asm/asm-offsets.h> 22#include <asm/memory.h> 23#include <asm/thread_info.h> 24#include <asm/pgtable.h> 25 |
26#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_SEMIHOSTING) 27#include CONFIG_DEBUG_LL_INCLUDE | 26#ifdef CONFIG_DEBUG_LL 27#include <mach/debug-macro.S> |
28#endif 29 30/* 31 * swapper_pg_dir is the virtual address of the initial page table. 32 * We place the page tables 16K below KERNEL_RAM_VADDR. Therefore, we must 33 * make sure that KERNEL_RAM_VADDR is correctly set. Currently, we expect 34 * the least significant 16 bits to be 0x8000, but we could probably 35 * relax this restriction to KERNEL_RAM_VADDR >= PAGE_OFFSET + 0x4000. --- 42 unchanged lines hidden (view full) --- 78 __HEAD 79ENTRY(stext) 80 81 THUMB( adr r9, BSYM(1f) ) @ Kernel is always entered in ARM. 82 THUMB( bx r9 ) @ If this is a Thumb-2 kernel, 83 THUMB( .thumb ) @ switch to Thumb now. 84 THUMB(1: ) 85 | 28#endif 29 30/* 31 * swapper_pg_dir is the virtual address of the initial page table. 32 * We place the page tables 16K below KERNEL_RAM_VADDR. Therefore, we must 33 * make sure that KERNEL_RAM_VADDR is correctly set. Currently, we expect 34 * the least significant 16 bits to be 0x8000, but we could probably 35 * relax this restriction to KERNEL_RAM_VADDR >= PAGE_OFFSET + 0x4000. --- 42 unchanged lines hidden (view full) --- 78 __HEAD 79ENTRY(stext) 80 81 THUMB( adr r9, BSYM(1f) ) @ Kernel is always entered in ARM. 82 THUMB( bx r9 ) @ If this is a Thumb-2 kernel, 83 THUMB( .thumb ) @ switch to Thumb now. 84 THUMB(1: ) 85 |
86 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode 87 @ and irqs disabled | 86#ifdef CONFIG_ARM_VIRT_EXT 87 bl __hyp_stub_install 88#endif 89 @ ensure svc mode and all interrupts masked 90 safe_svcmode_maskall r9 91 |
88 mrc p15, 0, r9, c0, c0 @ get processor id 89 bl __lookup_processor_type @ r5=procinfo r9=cpuid 90 movs r10, r5 @ invalid processor (r5=0)? 91 THUMB( it eq ) @ force fixup-able long branch encoding 92 beq __error_p @ yes, error 'p' 93 94#ifdef CONFIG_ARM_LPAE 95 mrc p15, 0, r3, c0, c1, 4 @ read ID_MMFR0 --- 225 unchanged lines hidden (view full) --- 321ENTRY(secondary_startup) 322 /* 323 * Common entry point for secondary CPUs. 324 * 325 * Ensure that we're in SVC mode, and IRQs are disabled. Lookup 326 * the processor type - there is no need to check the machine type 327 * as it has already been validated by the primary processor. 328 */ | 92 mrc p15, 0, r9, c0, c0 @ get processor id 93 bl __lookup_processor_type @ r5=procinfo r9=cpuid 94 movs r10, r5 @ invalid processor (r5=0)? 95 THUMB( it eq ) @ force fixup-able long branch encoding 96 beq __error_p @ yes, error 'p' 97 98#ifdef CONFIG_ARM_LPAE 99 mrc p15, 0, r3, c0, c1, 4 @ read ID_MMFR0 --- 225 unchanged lines hidden (view full) --- 325ENTRY(secondary_startup) 326 /* 327 * Common entry point for secondary CPUs. 328 * 329 * Ensure that we're in SVC mode, and IRQs are disabled. Lookup 330 * the processor type - there is no need to check the machine type 331 * as it has already been validated by the primary processor. 332 */ |
329 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 | 333#ifdef CONFIG_ARM_VIRT_EXT 334 bl __hyp_stub_install 335#endif 336 safe_svcmode_maskall r9 337 |
330 mrc p15, 0, r9, c0, c0 @ get processor id 331 bl __lookup_processor_type 332 movs r10, r5 @ invalid processor? 333 moveq r0, #'p' @ yes, error 'p' 334 THUMB( it eq ) @ force fixup-able long branch encoding 335 beq __error_p 336 337 /* --- 265 unchanged lines hidden --- | 338 mrc p15, 0, r9, c0, c0 @ get processor id 339 bl __lookup_processor_type 340 movs r10, r5 @ invalid processor? 341 moveq r0, #'p' @ yes, error 'p' 342 THUMB( it eq ) @ force fixup-able long branch encoding 343 beq __error_p 344 345 /* --- 265 unchanged lines hidden --- |