Kconfig (ed3982cf3748b657ffb79d9d1c2e4a562661db2d) Kconfig (1b9f95f8ade9efc2bd49f0e7b9dc61a038ac3eef)
1config ARM
2 bool
3 default y
4 select HAVE_AOUT
5 select HAVE_DMA_API_DEBUG
6 select HAVE_IDE
7 select HAVE_MEMBLOCK
8 select RTC_LIB

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190 hex
191 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
192 default DRAM_BASE if REMAP_VECTORS_TO_RAM
193 default 0x00000000
194 help
195 The base address of exception vectors.
196
197config ARM_PATCH_PHYS_VIRT
1config ARM
2 bool
3 default y
4 select HAVE_AOUT
5 select HAVE_DMA_API_DEBUG
6 select HAVE_IDE
7 select HAVE_MEMBLOCK
8 select RTC_LIB

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190 hex
191 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
192 default DRAM_BASE if REMAP_VECTORS_TO_RAM
193 default 0x00000000
194 help
195 The base address of exception vectors.
196
197config ARM_PATCH_PHYS_VIRT
198 bool "Patch physical to virtual translations at runtime"
198 bool "Patch physical to virtual translations at runtime" if EMBEDDED
199 default y
199 depends on !XIP_KERNEL && MMU
200 depends on !ARCH_REALVIEW || !SPARSEMEM
201 help
202 Patch phys-to-virt and virt-to-phys translation functions at
203 boot and module load time according to the position of the
204 kernel in system memory.
205
206 This can only be used with non-XIP MMU kernels where the base
200 depends on !XIP_KERNEL && MMU
201 depends on !ARCH_REALVIEW || !SPARSEMEM
202 help
203 Patch phys-to-virt and virt-to-phys translation functions at
204 boot and module load time according to the position of the
205 kernel in system memory.
206
207 This can only be used with non-XIP MMU kernels where the base
207 of physical memory is at a 16MB boundary, or theoretically 64K
208 for the MSM machine class.
208 of physical memory is at a 16MB boundary.
209
209
210config ARM_PATCH_PHYS_VIRT_16BIT
211 def_bool y
212 depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
210 Only disable this option if you know that you do not require
211 this feature (eg, building a kernel for a single machine) and
212 you need to shrink the kernel to the minimal size.
213
214config NO_MACH_MEMORY_H
215 bool
213 help
216 help
214 This option extends the physical to virtual translation patching
215 to allow physical memory down to a theoretical minimum of 64K
216 boundaries.
217 Select this when mach/memory.h is removed.
217
218
219config PHYS_OFFSET
220 hex "Physical address of main memory"
221 depends on !ARM_PATCH_PHYS_VIRT && NO_MACH_MEMORY_H
222 help
223 Please provide the physical address corresponding to the
224 location of main memory in your system.
225
218source "init/Kconfig"
219
220source "kernel/Kconfig.freezer"
221
222menu "System Type"
223
224config MMU
225 bool "MMU-based Paged Memory Management Support"

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296 help
297 This enables support for the ARM Ltd Versatile Express boards.
298
299config ARCH_AT91
300 bool "Atmel AT91"
301 select ARCH_REQUIRE_GPIOLIB
302 select HAVE_CLK
303 select CLKDEV_LOOKUP
226source "init/Kconfig"
227
228source "kernel/Kconfig.freezer"
229
230menu "System Type"
231
232config MMU
233 bool "MMU-based Paged Memory Management Support"

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304 help
305 This enables support for the ARM Ltd Versatile Express boards.
306
307config ARCH_AT91
308 bool "Atmel AT91"
309 select ARCH_REQUIRE_GPIOLIB
310 select HAVE_CLK
311 select CLKDEV_LOOKUP
304 select ARM_PATCH_PHYS_VIRT if MMU
305 help
306 This enables support for systems based on the Atmel AT91RM9200,
307 AT91SAM9 and AT91CAP9 processors.
308
309config ARCH_BCMRING
310 bool "Broadcom BCMRING"
311 depends on MMU
312 select CPU_V6

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1266 help
1267 This option enables the workaround for the 754327 Cortex-A9 (prior to
1268 r2p0) erratum. The Store Buffer does not have any automatic draining
1269 mechanism and therefore a livelock may occur if an external agent
1270 continuously polls a memory location waiting to observe an update.
1271 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1272 written polling loops from denying visibility of updates to memory.
1273
312 help
313 This enables support for systems based on the Atmel AT91RM9200,
314 AT91SAM9 and AT91CAP9 processors.
315
316config ARCH_BCMRING
317 bool "Broadcom BCMRING"
318 depends on MMU
319 select CPU_V6

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1273 help
1274 This option enables the workaround for the 754327 Cortex-A9 (prior to
1275 r2p0) erratum. The Store Buffer does not have any automatic draining
1276 mechanism and therefore a livelock may occur if an external agent
1277 continuously polls a memory location waiting to observe an update.
1278 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1279 written polling loops from denying visibility of updates to memory.
1280
1274config ARM_ERRATA_364296
1275 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1276 depends on CPU_V6 && !SMP
1277 help
1278 This options enables the workaround for the 364296 ARM1136
1279 r0p2 erratum (possible cache data corruption with
1280 hit-under-miss enabled). It sets the undocumented bit 31 in
1281 the auxiliary control register and the FI bit in the control
1282 register, thus disabling hit-under-miss without putting the
1283 processor into full low interrupt latency mode. ARM11MPCore
1284 is not affected.
1285
1286endmenu
1287
1288source "arch/arm/common/Kconfig"
1289
1290menu "Bus support"
1291
1292config ARM_AMBA
1293 bool

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1281endmenu
1282
1283source "arch/arm/common/Kconfig"
1284
1285menu "Bus support"
1286
1287config ARM_AMBA
1288 bool

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