mtk-sd.yaml (972d6a7dcec3ad3226661034c5d8cb2d30585157) mtk-sd.yaml (2fee14ac97dc74f6a8525e69640c6972a4f36899)
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MTK MSDC Storage Host Controller Binding
8

--- 17 unchanged lines hidden (view full) ---

26 - mediatek,mt8173-mmc
27 - mediatek,mt8183-mmc
28 - mediatek,mt8516-mmc
29 - items:
30 - const: mediatek,mt7623-mmc
31 - const: mediatek,mt2701-mmc
32 - items:
33 - const: mediatek,mt8192-mmc
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MTK MSDC Storage Host Controller Binding
8

--- 17 unchanged lines hidden (view full) ---

26 - mediatek,mt8173-mmc
27 - mediatek,mt8183-mmc
28 - mediatek,mt8516-mmc
29 - items:
30 - const: mediatek,mt7623-mmc
31 - const: mediatek,mt2701-mmc
32 - items:
33 - const: mediatek,mt8192-mmc
34 - const: mediatek,mt8183-mmc
35 - items:
34 - const: mediatek,mt8195-mmc
35 - const: mediatek,mt8183-mmc
36
37 clocks:
38 description:
39 Should contain phandle for the clock feeding the MMC controller.
40 minItems: 2
36 - const: mediatek,mt8195-mmc
37 - const: mediatek,mt8183-mmc
38
39 clocks:
40 description:
41 Should contain phandle for the clock feeding the MMC controller.
42 minItems: 2
43 maxItems: 8
41 items:
42 - description: source clock (required).
43 - description: HCLK which used for host (required).
44 - description: independent source clock gate (required for MT2712).
45 - description: bus clock used for internal register access (required for MT2712 MSDC0/3).
46 - description: msdc subsys clock gate (required for MT8192).
47 - description: peripheral bus clock gate (required for MT8192).
48 - description: AXI bus clock gate (required for MT8192).
49 - description: AHB bus clock gate (required for MT8192).
50
51 clock-names:
52 minItems: 2
44 items:
45 - description: source clock (required).
46 - description: HCLK which used for host (required).
47 - description: independent source clock gate (required for MT2712).
48 - description: bus clock used for internal register access (required for MT2712 MSDC0/3).
49 - description: msdc subsys clock gate (required for MT8192).
50 - description: peripheral bus clock gate (required for MT8192).
51 - description: AXI bus clock gate (required for MT8192).
52 - description: AHB bus clock gate (required for MT8192).
53
54 clock-names:
55 minItems: 2
56 maxItems: 8
53 items:
54 - const: source
55 - const: hclk
56 - const: source_cg
57 - const: bus_clk
58 - const: sys_cg
59 - const: pclk_cg
60 - const: axi_cg

--- 115 unchanged lines hidden --- 		57 items:
58 - const: source
59 - const: hclk
60 - const: source_cg
61 - const: bus_clk
62 - const: sys_cg
63 - const: pclk_cg
64 - const: axi_cg

--- 115 unchanged lines hidden ---