libpmc.c (51dd214c84efceda87c2ac10d34b7e3ee5b6c28f) libpmc.c (6411d14d62a6bca53ba67bc581a1d89448f34944)
1/*-
2 * Copyright (c) 2003-2008 Joseph Koshy
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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69 struct pmc_op_pmcallocate *_pmc_config);
70static int p6_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
71 struct pmc_op_pmcallocate *_pmc_config);
72#endif
73#if defined(__amd64__) || defined(__i386__)
74static int tsc_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
75 struct pmc_op_pmcallocate *_pmc_config);
76#endif
1/*-
2 * Copyright (c) 2003-2008 Joseph Koshy
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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69 struct pmc_op_pmcallocate *_pmc_config);
70static int p6_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
71 struct pmc_op_pmcallocate *_pmc_config);
72#endif
73#if defined(__amd64__) || defined(__i386__)
74static int tsc_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
75 struct pmc_op_pmcallocate *_pmc_config);
76#endif
77#if defined(__arm__)
77#if defined(__XSCALE__)
78static int xscale_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
79 struct pmc_op_pmcallocate *_pmc_config);
80#endif
78#if defined(__XSCALE__)
79static int xscale_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
80 struct pmc_op_pmcallocate *_pmc_config);
81#endif
82static int armv7_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
83 struct pmc_op_pmcallocate *_pmc_config);
84#endif
81#if defined(__mips__)
82static int mips_allocate_pmc(enum pmc_event _pe, char* ctrspec,
83 struct pmc_op_pmcallocate *_pmc_config);
84#endif /* __mips__ */
85static int soft_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
86 struct pmc_op_pmcallocate *_pmc_config);
87
88#if defined(__powerpc__)

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148
149PMC_CLASSDEP_TABLE(iaf, IAF);
150PMC_CLASSDEP_TABLE(k7, K7);
151PMC_CLASSDEP_TABLE(k8, K8);
152PMC_CLASSDEP_TABLE(p4, P4);
153PMC_CLASSDEP_TABLE(p5, P5);
154PMC_CLASSDEP_TABLE(p6, P6);
155PMC_CLASSDEP_TABLE(xscale, XSCALE);
85#if defined(__mips__)
86static int mips_allocate_pmc(enum pmc_event _pe, char* ctrspec,
87 struct pmc_op_pmcallocate *_pmc_config);
88#endif /* __mips__ */
89static int soft_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
90 struct pmc_op_pmcallocate *_pmc_config);
91
92#if defined(__powerpc__)

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152
153PMC_CLASSDEP_TABLE(iaf, IAF);
154PMC_CLASSDEP_TABLE(k7, K7);
155PMC_CLASSDEP_TABLE(k8, K8);
156PMC_CLASSDEP_TABLE(p4, P4);
157PMC_CLASSDEP_TABLE(p5, P5);
158PMC_CLASSDEP_TABLE(p6, P6);
159PMC_CLASSDEP_TABLE(xscale, XSCALE);
160PMC_CLASSDEP_TABLE(armv7, ARMV7);
156PMC_CLASSDEP_TABLE(mips24k, MIPS24K);
157PMC_CLASSDEP_TABLE(octeon, OCTEON);
158PMC_CLASSDEP_TABLE(ucf, UCF);
159PMC_CLASSDEP_TABLE(ppc7450, PPC7450);
160PMC_CLASSDEP_TABLE(ppc970, PPC970);
161
162static struct pmc_event_descr soft_event_table[PMC_EV_DYN_COUNT];
163

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281PMC_MDEP_TABLE(westmere, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
282PMC_MDEP_TABLE(westmere_ex, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);
283PMC_MDEP_TABLE(k7, K7, PMC_CLASS_SOFT, PMC_CLASS_TSC);
284PMC_MDEP_TABLE(k8, K8, PMC_CLASS_SOFT, PMC_CLASS_TSC);
285PMC_MDEP_TABLE(p4, P4, PMC_CLASS_SOFT, PMC_CLASS_TSC);
286PMC_MDEP_TABLE(p5, P5, PMC_CLASS_SOFT, PMC_CLASS_TSC);
287PMC_MDEP_TABLE(p6, P6, PMC_CLASS_SOFT, PMC_CLASS_TSC);
288PMC_MDEP_TABLE(xscale, XSCALE, PMC_CLASS_SOFT, PMC_CLASS_XSCALE);
161PMC_CLASSDEP_TABLE(mips24k, MIPS24K);
162PMC_CLASSDEP_TABLE(octeon, OCTEON);
163PMC_CLASSDEP_TABLE(ucf, UCF);
164PMC_CLASSDEP_TABLE(ppc7450, PPC7450);
165PMC_CLASSDEP_TABLE(ppc970, PPC970);
166
167static struct pmc_event_descr soft_event_table[PMC_EV_DYN_COUNT];
168

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286PMC_MDEP_TABLE(westmere, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
287PMC_MDEP_TABLE(westmere_ex, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);
288PMC_MDEP_TABLE(k7, K7, PMC_CLASS_SOFT, PMC_CLASS_TSC);
289PMC_MDEP_TABLE(k8, K8, PMC_CLASS_SOFT, PMC_CLASS_TSC);
290PMC_MDEP_TABLE(p4, P4, PMC_CLASS_SOFT, PMC_CLASS_TSC);
291PMC_MDEP_TABLE(p5, P5, PMC_CLASS_SOFT, PMC_CLASS_TSC);
292PMC_MDEP_TABLE(p6, P6, PMC_CLASS_SOFT, PMC_CLASS_TSC);
293PMC_MDEP_TABLE(xscale, XSCALE, PMC_CLASS_SOFT, PMC_CLASS_XSCALE);
294PMC_MDEP_TABLE(armv7, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7);
289PMC_MDEP_TABLE(mips24k, MIPS24K, PMC_CLASS_SOFT, PMC_CLASS_MIPS24K);
290PMC_MDEP_TABLE(octeon, OCTEON, PMC_CLASS_SOFT, PMC_CLASS_OCTEON);
291PMC_MDEP_TABLE(ppc7450, PPC7450, PMC_CLASS_SOFT, PMC_CLASS_PPC7450);
292PMC_MDEP_TABLE(ppc970, PPC970, PMC_CLASS_SOFT, PMC_CLASS_PPC970);
293PMC_MDEP_TABLE(generic, SOFT, PMC_CLASS_SOFT);
294
295static const struct pmc_event_descr tsc_event_table[] =
296{

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341#endif
342#if defined(__i386__)
343PMC_CLASS_TABLE_DESC(p5, P5, p5, p5);
344PMC_CLASS_TABLE_DESC(p6, P6, p6, p6);
345#endif
346#if defined(__i386__) || defined(__amd64__)
347PMC_CLASS_TABLE_DESC(tsc, TSC, tsc, tsc);
348#endif
295PMC_MDEP_TABLE(mips24k, MIPS24K, PMC_CLASS_SOFT, PMC_CLASS_MIPS24K);
296PMC_MDEP_TABLE(octeon, OCTEON, PMC_CLASS_SOFT, PMC_CLASS_OCTEON);
297PMC_MDEP_TABLE(ppc7450, PPC7450, PMC_CLASS_SOFT, PMC_CLASS_PPC7450);
298PMC_MDEP_TABLE(ppc970, PPC970, PMC_CLASS_SOFT, PMC_CLASS_PPC970);
299PMC_MDEP_TABLE(generic, SOFT, PMC_CLASS_SOFT);
300
301static const struct pmc_event_descr tsc_event_table[] =
302{

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347#endif
348#if defined(__i386__)
349PMC_CLASS_TABLE_DESC(p5, P5, p5, p5);
350PMC_CLASS_TABLE_DESC(p6, P6, p6, p6);
351#endif
352#if defined(__i386__) || defined(__amd64__)
353PMC_CLASS_TABLE_DESC(tsc, TSC, tsc, tsc);
354#endif
355#if defined(__arm__)
349#if defined(__XSCALE__)
350PMC_CLASS_TABLE_DESC(xscale, XSCALE, xscale, xscale);
351#endif
356#if defined(__XSCALE__)
357PMC_CLASS_TABLE_DESC(xscale, XSCALE, xscale, xscale);
358#endif
359PMC_CLASS_TABLE_DESC(armv7, ARMV7, armv7, armv7);
360#endif
352#if defined(__mips__)
353PMC_CLASS_TABLE_DESC(mips24k, MIPS24K, mips24k, mips);
354PMC_CLASS_TABLE_DESC(octeon, OCTEON, octeon, mips);
355#endif /* __mips__ */
356#if defined(__powerpc__)
357PMC_CLASS_TABLE_DESC(ppc7450, PPC7450, ppc7450, powerpc);
358PMC_CLASS_TABLE_DESC(ppc970, PPC970, ppc970, powerpc);
359#endif

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2366
2367 if ((int)pe < PMC_EV_SOFT_FIRST || (int)pe > PMC_EV_SOFT_LAST)
2368 return (-1);
2369
2370 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
2371 return (0);
2372}
2373
361#if defined(__mips__)
362PMC_CLASS_TABLE_DESC(mips24k, MIPS24K, mips24k, mips);
363PMC_CLASS_TABLE_DESC(octeon, OCTEON, octeon, mips);
364#endif /* __mips__ */
365#if defined(__powerpc__)
366PMC_CLASS_TABLE_DESC(ppc7450, PPC7450, ppc7450, powerpc);
367PMC_CLASS_TABLE_DESC(ppc970, PPC970, ppc970, powerpc);
368#endif

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2375
2376 if ((int)pe < PMC_EV_SOFT_FIRST || (int)pe > PMC_EV_SOFT_LAST)
2377 return (-1);
2378
2379 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
2380 return (0);
2381}
2382
2383#if defined(__arm__)
2374#if defined(__XSCALE__)
2375
2376static struct pmc_event_alias xscale_aliases[] = {
2377 EV_ALIAS("branches", "BRANCH_RETIRED"),
2378 EV_ALIAS("branch-mispredicts", "BRANCH_MISPRED"),
2379 EV_ALIAS("dc-misses", "DC_MISS"),
2380 EV_ALIAS("ic-misses", "IC_MISS"),
2381 EV_ALIAS("instructions", "INSTR_RETIRED"),

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2389 default:
2390 break;
2391 }
2392
2393 return (0);
2394}
2395#endif
2396
2384#if defined(__XSCALE__)
2385
2386static struct pmc_event_alias xscale_aliases[] = {
2387 EV_ALIAS("branches", "BRANCH_RETIRED"),
2388 EV_ALIAS("branch-mispredicts", "BRANCH_MISPRED"),
2389 EV_ALIAS("dc-misses", "DC_MISS"),
2390 EV_ALIAS("ic-misses", "IC_MISS"),
2391 EV_ALIAS("instructions", "INSTR_RETIRED"),

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2399 default:
2400 break;
2401 }
2402
2403 return (0);
2404}
2405#endif
2406
2407static struct pmc_event_alias armv7_aliases[] = {
2408 EV_ALIAS("dc-misses", "L1_DCACHE_REFILL"),
2409 EV_ALIAS("ic-misses", "L1_ICACHE_REFILL"),
2410 EV_ALIAS("instructions", "INSTR_EXECUTED"),
2411 EV_ALIAS(NULL, NULL)
2412};
2413static int
2414armv7_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
2415 struct pmc_op_pmcallocate *pmc_config __unused)
2416{
2417 switch (pe) {
2418 default:
2419 break;
2420 }
2421
2422 return (0);
2423}
2424#endif
2425
2397#if defined(__mips__)
2398
2399static struct pmc_event_alias mips24k_aliases[] = {
2400 EV_ALIAS("instructions", "INSTR_EXECUTED"),
2401 EV_ALIAS("branches", "BRANCH_COMPLETED"),
2402 EV_ALIAS("branch-mispredicts", "BRANCH_MISPRED"),
2403 EV_ALIAS(NULL, NULL)
2404};

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2881 case PMC_CLASS_P6:
2882 ev = p6_event_table;
2883 count = PMC_EVENT_TABLE_SIZE(p6);
2884 break;
2885 case PMC_CLASS_XSCALE:
2886 ev = xscale_event_table;
2887 count = PMC_EVENT_TABLE_SIZE(xscale);
2888 break;
2426#if defined(__mips__)
2427
2428static struct pmc_event_alias mips24k_aliases[] = {
2429 EV_ALIAS("instructions", "INSTR_EXECUTED"),
2430 EV_ALIAS("branches", "BRANCH_COMPLETED"),
2431 EV_ALIAS("branch-mispredicts", "BRANCH_MISPRED"),
2432 EV_ALIAS(NULL, NULL)
2433};

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2910 case PMC_CLASS_P6:
2911 ev = p6_event_table;
2912 count = PMC_EVENT_TABLE_SIZE(p6);
2913 break;
2914 case PMC_CLASS_XSCALE:
2915 ev = xscale_event_table;
2916 count = PMC_EVENT_TABLE_SIZE(xscale);
2917 break;
2918 case PMC_CLASS_ARMV7:
2919 ev = armv7_event_table;
2920 count = PMC_EVENT_TABLE_SIZE(armv7);
2921 break;
2889 case PMC_CLASS_MIPS24K:
2890 ev = mips24k_event_table;
2891 count = PMC_EVENT_TABLE_SIZE(mips24k);
2892 break;
2893 case PMC_CLASS_OCTEON:
2894 ev = octeon_event_table;
2895 count = PMC_EVENT_TABLE_SIZE(octeon);
2896 break;

--- 261 unchanged lines hidden (view full) ---

3158 case PMC_CPU_INTEL_PIV:
3159 PMC_MDEP_INIT(p4);
3160 pmc_class_table[n] = &p4_class_table_descr;
3161 break;
3162#endif
3163 case PMC_CPU_GENERIC:
3164 PMC_MDEP_INIT(generic);
3165 break;
2922 case PMC_CLASS_MIPS24K:
2923 ev = mips24k_event_table;
2924 count = PMC_EVENT_TABLE_SIZE(mips24k);
2925 break;
2926 case PMC_CLASS_OCTEON:
2927 ev = octeon_event_table;
2928 count = PMC_EVENT_TABLE_SIZE(octeon);
2929 break;

--- 261 unchanged lines hidden (view full) ---

3191 case PMC_CPU_INTEL_PIV:
3192 PMC_MDEP_INIT(p4);
3193 pmc_class_table[n] = &p4_class_table_descr;
3194 break;
3195#endif
3196 case PMC_CPU_GENERIC:
3197 PMC_MDEP_INIT(generic);
3198 break;
3199#if defined(__arm__)
3166#if defined(__XSCALE__)
3167 case PMC_CPU_INTEL_XSCALE:
3168 PMC_MDEP_INIT(xscale);
3169 pmc_class_table[n] = &xscale_class_table_descr;
3170 break;
3171#endif
3200#if defined(__XSCALE__)
3201 case PMC_CPU_INTEL_XSCALE:
3202 PMC_MDEP_INIT(xscale);
3203 pmc_class_table[n] = &xscale_class_table_descr;
3204 break;
3205#endif
3206 case PMC_CPU_ARMV7:
3207 PMC_MDEP_INIT(armv7);
3208 pmc_class_table[n] = &armv7_class_table_descr;
3209 break;
3210#endif
3172#if defined(__mips__)
3173 case PMC_CPU_MIPS_24K:
3174 PMC_MDEP_INIT(mips24k);
3175 pmc_class_table[n] = &mips24k_class_table_descr;
3176 break;
3177 case PMC_CPU_MIPS_OCTEON:
3178 PMC_MDEP_INIT(octeon);
3179 pmc_class_table[n] = &octeon_class_table_descr;

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3364 ev = p5_event_table;
3365 evfence = p5_event_table + PMC_EVENT_TABLE_SIZE(p5);
3366 } else if (pe >= PMC_EV_P6_FIRST && pe <= PMC_EV_P6_LAST) {
3367 ev = p6_event_table;
3368 evfence = p6_event_table + PMC_EVENT_TABLE_SIZE(p6);
3369 } else if (pe >= PMC_EV_XSCALE_FIRST && pe <= PMC_EV_XSCALE_LAST) {
3370 ev = xscale_event_table;
3371 evfence = xscale_event_table + PMC_EVENT_TABLE_SIZE(xscale);
3211#if defined(__mips__)
3212 case PMC_CPU_MIPS_24K:
3213 PMC_MDEP_INIT(mips24k);
3214 pmc_class_table[n] = &mips24k_class_table_descr;
3215 break;
3216 case PMC_CPU_MIPS_OCTEON:
3217 PMC_MDEP_INIT(octeon);
3218 pmc_class_table[n] = &octeon_class_table_descr;

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3403 ev = p5_event_table;
3404 evfence = p5_event_table + PMC_EVENT_TABLE_SIZE(p5);
3405 } else if (pe >= PMC_EV_P6_FIRST && pe <= PMC_EV_P6_LAST) {
3406 ev = p6_event_table;
3407 evfence = p6_event_table + PMC_EVENT_TABLE_SIZE(p6);
3408 } else if (pe >= PMC_EV_XSCALE_FIRST && pe <= PMC_EV_XSCALE_LAST) {
3409 ev = xscale_event_table;
3410 evfence = xscale_event_table + PMC_EVENT_TABLE_SIZE(xscale);
3411 } else if (pe >= PMC_EV_ARMV7_FIRST && pe <= PMC_EV_ARMV7_LAST) {
3412 ev = armv7_event_table;
3413 evfence = armv7_event_table + PMC_EVENT_TABLE_SIZE(armv7);
3372 } else if (pe >= PMC_EV_MIPS24K_FIRST && pe <= PMC_EV_MIPS24K_LAST) {
3373 ev = mips24k_event_table;
3374 evfence = mips24k_event_table + PMC_EVENT_TABLE_SIZE(mips24k);
3375 } else if (pe >= PMC_EV_OCTEON_FIRST && pe <= PMC_EV_OCTEON_LAST) {
3376 ev = octeon_event_table;
3377 evfence = octeon_event_table + PMC_EVENT_TABLE_SIZE(octeon);
3378 } else if (pe >= PMC_EV_PPC7450_FIRST && pe <= PMC_EV_PPC7450_LAST) {
3379 ev = ppc7450_event_table;

--- 214 unchanged lines hidden --- 		3414 } else if (pe >= PMC_EV_MIPS24K_FIRST && pe <= PMC_EV_MIPS24K_LAST) {
3415 ev = mips24k_event_table;
3416 evfence = mips24k_event_table + PMC_EVENT_TABLE_SIZE(mips24k);
3417 } else if (pe >= PMC_EV_OCTEON_FIRST && pe <= PMC_EV_OCTEON_LAST) {
3418 ev = octeon_event_table;
3419 evfence = octeon_event_table + PMC_EVENT_TABLE_SIZE(octeon);
3420 } else if (pe >= PMC_EV_PPC7450_FIRST && pe <= PMC_EV_PPC7450_LAST) {
3421 ev = ppc7450_event_table;

--- 214 unchanged lines hidden ---