1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _PCI_SUN4V_H 28 #define _PCI_SUN4V_H 29 30 #include "pcibus_labels.h" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* 37 * Data for label lookup based on physical slot number. 38 * 39 * Platforms may need entries here if the PCIe slot labels 40 * provided by firmware are missing or are incorrect. 41 */ 42 43 physnm_t t200_pnms[] = { 44 /* Slot #, Label */ 45 { 224, "PCIE0" }, 46 { 225, "PCIE1" }, 47 { 226, "PCIE2" } 48 }; 49 50 physnm_t t5120_pnms[] = { 51 /* Slot #, Label */ 52 { 0, "MB/RISER0/PCIE0" }, 53 { 1, "MB/RISER1/PCIE1" }, 54 { 2, "MB/RISER2/PCIE2" } 55 }; 56 57 physnm_t t5220_pnms[] = { 58 /* Slot #, Label */ 59 { 0, "MB/RISER0/PCIE0" }, 60 { 1, "MB/RISER1/PCIE1" }, 61 { 2, "MB/RISER2/PCIE2" }, 62 { 3, "MB/RISER0/PCIE3" }, 63 { 4, "MB/RISER1/PCIE4" }, 64 { 5, "MB/RISER2/PCIE5" } 65 }; 66 67 physnm_t usbrdt5240_pnms[] = { 68 /* Slot #, Label */ 69 { 0, "MB/RISER0/EM0" }, 70 { 1, "MB/RISER0/EM1" }, 71 { 2, "MB/RISER1/EM2" }, 72 { 3, "MB/RISER1/EM3" } 73 }; 74 75 physnm_t netra_t5220_pnms[] = { 76 /* Slot #, Label */ 77 { 0, "MB/RISER0/PCIE0" }, 78 { 1, "MB/RISER1/PCIE1" }, 79 { 2, "MB/RISER2/PCIE2" }, 80 { 3, "MB/PCI_MEZZ/PCIX3" }, 81 { 4, "MB/PCI_MEZZ/PCIX4" }, 82 { 5, "MB/PCI_MEZZ/PCIE5" } 83 }; 84 85 physnm_t netra_t5440_pnms[] = { 86 /* Slot #, Label */ 87 { 0, "MB/PCI_AUX/PCIX0" }, 88 { 1, "MB/PCI_AUX/PCIX1" }, 89 { 2, "MB/PCI_AUX/PCIE2" }, 90 { 3, "MB/PCI_AUX/PCIE3" }, 91 { 4, "MB/PCI_MEZZ/XAUI4" }, 92 { 5, "MB/PCI_MEZZ/XAUI5" }, 93 { 6, "MB/PCI_MEZZ/PCIE6" }, 94 { 7, "MB/PCI_MEZZ/PCIE7" }, 95 { 8, "MB/PCI_MEZZ/PCIE8" }, 96 { 9, "MB/PCI_MEZZ/PCIE9" } 97 }; 98 99 physnm_t t5440_pnms[] = { 100 /* Slot #, Label */ 101 { 0, "MB/PCIE0" }, 102 { 1, "MB/PCIE1" }, 103 { 2, "MB/PCIE2" }, 104 { 3, "MB/PCIE3" }, 105 { 4, "MB/PCIE4" }, 106 { 5, "MB/PCIE5" }, 107 { 6, "MB/PCIE6" }, 108 { 7, "MB/PCIE7" } 109 }; 110 111 physnm_t blade_t6340_pnms[] = { 112 /* Slot #, Label */ 113 { 0, "SYS/EM0" }, 114 { 1, "SYS/EM1" } 115 }; 116 117 pphysnm_t plat_pnames[] = { 118 { "Sun-Fire-T200", 119 sizeof (t200_pnms) / sizeof (physnm_t), 120 t200_pnms }, 121 { "SPARC-Enterprise-T5120", 122 sizeof (t5120_pnms) / sizeof (physnm_t), 123 t5120_pnms }, 124 { "SPARC-Enterprise-T5220", 125 sizeof (t5220_pnms) / sizeof (physnm_t), 126 t5220_pnms }, 127 /* 128 * T5140/T5240 uses the same chassis as T5120/T5220, hence 129 * the same PCI slot mappings 130 */ 131 { "T5140", 132 sizeof (t5120_pnms) / sizeof (physnm_t), 133 t5120_pnms }, 134 { "T5240", 135 sizeof (t5220_pnms) / sizeof (physnm_t), 136 t5220_pnms }, 137 { "T5440", 138 sizeof (t5440_pnms) / sizeof (physnm_t), 139 t5440_pnms }, 140 { "USBRDT-5240", 141 sizeof (usbrdt5240_pnms) / sizeof (physnm_t), 142 usbrdt5240_pnms }, 143 { "Netra-T5220", 144 sizeof (netra_t5220_pnms) / sizeof (physnm_t), 145 netra_t5220_pnms }, 146 { "Netra-T5440", 147 sizeof (netra_t5440_pnms) / sizeof (physnm_t), 148 netra_t5440_pnms }, 149 { "Sun-Blade-T6340", 150 sizeof (blade_t6340_pnms) / sizeof (physnm_t), 151 blade_t6340_pnms } 152 }; 153 154 physlot_names_t PhyslotNMs = { 155 sizeof (plat_pnames) / sizeof (pphysnm_t), 156 plat_pnames 157 }; 158 159 /* 160 * Data for label lookup based on device info. 161 * 162 * Platforms need entries here if there is no physical slot number 163 * (i.e. pci), and slot labels provided by firmware are missing. 164 */ 165 166 devlab_t t200_missing[] = { 167 /* board, bridge, root-complex, bus, dev, label, test func */ 168 { 0, 0, 1 - TO_PCI, 6, 1, "PCIX1", NULL }, 169 { 0, 0, 1 - TO_PCI, 6, 2, "PCIX0", NULL } 170 }; 171 172 pdevlabs_t plats_missing[] = { 173 { "Sun-Fire-T200", 174 sizeof (t200_missing) / sizeof (devlab_t), 175 t200_missing }, 176 }; 177 178 missing_names_t Missing = { 179 sizeof (plats_missing) / sizeof (pdevlabs_t), 180 plats_missing 181 }; 182 183 char *usT1_plats[] = { 184 "Sun-Fire-T200", 185 "Netra-T2000", 186 "SPARC-Enterprise-T1000", 187 "SPARC-Enterprise-T2000", 188 "Sun-Fire-T1000", 189 "Netra-CP3060", 190 "Sun-Blade-T6300", 191 NULL 192 }; 193 194 slotnm_rewrite_t *Slot_Rewrites = NULL; 195 physlot_names_t *Physlot_Names = &PhyslotNMs; 196 missing_names_t *Missing_Names = &Missing; 197 198 #ifdef __cplusplus 199 } 200 #endif 201 202 #endif /* _PCI_SUN4V_H */ 203