1/*- 2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29/ { 30 #address-cells = <1>; 31 #size-cells = <1>; 32 33 interrupt-parent = <&AINTC>; 34 35 SOC: am335x { 36 #address-cells = <1>; 37 #size-cells = <1>; 38 compatible = "simple-bus"; 39 ranges; 40 bus-frequency = <0>; 41 42 AINTC: interrupt-controller@48200000 { 43 compatible = "ti,aintc"; 44 interrupt-controller; 45 #address-cells = <0>; 46 #interrupt-cells = <1>; 47 reg = < 0x48200000 0x1000 >; 48 }; 49 50 pmu { 51 compatible = "arm,cortex-a8-pmu"; 52 interrupts = <3>; 53 }; 54 55 scm@44e10000 { 56 compatible = "ti,scm"; 57 reg = < 0x44e10000 0x2000 >; 58 }; 59 60 prcm@44E00000 { 61 compatible = "am335x,prcm"; 62 #address-cells = <1>; 63 #size-cells = <1>; 64 reg = < 0x44E00000 0x1300 >; 65 }; 66 67 dmtimers@44E05000 { 68 compatible = "ti,am335x-dmtimer"; 69 #address-cells = <1>; 70 #size-cells = <1>; 71 reg = < 0x44E05000 0x1000 72 0x44E31000 0x1000 73 0x48040000 0x1000 74 0x48042000 0x1000 75 0x48044000 0x1000 76 0x48046000 0x1000 77 0x48048000 0x1000 78 0x4804A000 0x1000 >; 79 interrupts = < 66 67 68 69 92 93 94 95 >; 80 interrupt-parent = <&AINTC>; 81 }; 82 83 rtc: rtc@44E3E000 { 84 compatible = "ti,da830-rtc"; 85 reg = <0x44E3E000 0x1000>; 86 interrupts = < 75 76 >; 87 interrupt-parent = <&AINTC>; 88 }; 89 90 adc0: adc@44E0D000 { 91 compatible = "ti,adc"; 92 reg = <0x44E0D000 0x2000>; 93 interrupts = < 16 >; 94 interrupt-parent = <&AINTC>; 95 }; 96 97 wdt1@44E35000 { 98 compatible = "ti,omap3-wdt"; 99 reg = <0x44E35000 0x1000>; 100 interrupts = <91>; 101 interrupt-parent = <&AINTC>; 102 }; 103 104 GPIO: gpio { 105 #gpio-cells = <3>; 106 compatible = "ti,gpio"; 107 gpio-controller; 108 reg =< 0x44E07000 0x1000 109 0x4804C000 0x1000 110 0x481AC000 0x1000 111 0x481AE000 0x1000 >; 112 interrupts = < 96 97 98 99 32 33 62 63 >; 113 interrupt-parent = <&AINTC>; 114 interrupt-controller; 115 #interrupt-cells = <1>; 116 }; 117 118 uart0: serial@44E09000 { 119 compatible = "ti,ns16550"; 120 reg = <0x44E09000 0x1000>; 121 reg-shift = <2>; 122 interrupts = < 72 >; 123 interrupt-parent = <&AINTC>; 124 clock-frequency = < 48000000 >; 125 uart-device-id = < 0 >; 126 }; 127 128 uart1: serial@48022000 { 129 compatible = "ti,ns16550"; 130 reg = <0x48022000 0x1000>; 131 reg-shift = <2>; 132 interrupts = < 73 >; 133 interrupt-parent = <&AINTC>; 134 clock-frequency = < 48000000 >; 135 uart-device-id = < 1 >; 136 status = "disabled"; 137 }; 138 139 uart2: serial@48024000 { 140 compatible = "ti,ns16550"; 141 reg = <0x48024000 0x1000>; 142 reg-shift = <2>; 143 interrupts = < 74 >; 144 interrupt-parent = <&AINTC>; 145 clock-frequency = < 48000000 >; 146 uart-device-id = < 2 >; 147 status = "disabled"; 148 }; 149 150 uart3: serial@481a6000 { 151 compatible = "ti,ns16550"; 152 reg = <0x481A6000 0x1000>; 153 reg-shift = <2>; 154 interrupts = < 44 >; 155 interrupt-parent = <&AINTC>; 156 clock-frequency = < 48000000 >; 157 uart-device-id = < 3 >; 158 status = "disabled"; 159 }; 160 161 uart4: serial@481a8000 { 162 compatible = "ti,ns16550"; 163 reg = <0x481A8000 0x1000>; 164 reg-shift = <2>; 165 interrupts = < 45 >; 166 interrupt-parent = <&AINTC>; 167 clock-frequency = < 48000000 >; 168 uart-device-id = < 4 >; 169 status = "disabled"; 170 }; 171 172 uart5: serial@481aa000 { 173 compatible = "ti,ns16550"; 174 reg = <0x481AA000 0x1000>; 175 reg-shift = <2>; 176 interrupts = < 46 >; 177 interrupt-parent = <&AINTC>; 178 clock-frequency = < 48000000 >; 179 uart-device-id = < 5 >; 180 status = "disabled"; 181 }; 182 183 edma3@49000000 { 184 compatible = "ti,edma3"; 185 reg =< 0x49000000 0x100000 /* Channel Controller Regs */ 186 0x49800000 0x100000 /* Transfer Controller 0 Regs */ 187 0x49900000 0x100000 /* Transfer Controller 1 Regs */ 188 0x49a00000 0x100000 >; /* Transfer Controller 2 Regs */ 189 interrupts = <12 13 14>; 190 interrupt-parent = <&AINTC>; 191 }; 192 193 mmchs0@48060000 { 194 compatible = "ti,omap3-hsmmc", "ti,mmchs"; 195 reg =<0x48060000 0x1000 >; 196 interrupts = <64>; 197 interrupt-parent = <&AINTC>; 198 mmchs-device-id = <0>; 199 mmchs-wp-gpio-pin = <0xffffffff>; 200 ti,dual-volt; 201 }; 202 203 mmchs1@481D8000 { 204 compatible = "ti,omap3-hsmmc", "ti,mmchs"; 205 reg =<0x481D8000 0x1000 >; 206 interrupts = <28>; 207 interrupt-parent = <&AINTC>; 208 mmchs-device-id = <1>; 209 mmchs-wp-gpio-pin = <0xffffffff>; 210 status = "disabled"; 211 }; 212 213 enet0: ethernet@4A100000 { 214 #address-cells = <1>; 215 #size-cells = <1>; 216 compatible = "ti,cpsw"; 217 reg = <0x4A100000 0x4000>; 218 interrupts = <40 41 42 43>; 219 interrupt-parent = <&AINTC>; 220 phy-handle = <&phy0>; 221 mdio@0 { 222 #address-cells = <1>; 223 #size-cells = <0>; 224 compatible = "ti,cpsw-mdio"; 225 phy0: ethernet-phy@0 { 226 reg = <0x0>; 227 }; 228 }; 229 }; 230 231 i2c0: i2c@44e0b000 { 232 #address-cells = <1>; 233 #size-cells = <0>; 234 compatible = "ti,i2c"; 235 reg =< 0x44e0b000 0x1000 >; 236 interrupts = <70>; 237 interrupt-parent = <&AINTC>; 238 i2c-device-id = <0>; 239 }; 240 241 i2c1: i2c@4802a000 { 242 #address-cells = <1>; 243 #size-cells = <0>; 244 compatible = "ti,i2c"; 245 reg =< 0x4802a000 0x1000 >; 246 interrupts = <71>; 247 interrupt-parent = <&AINTC>; 248 i2c-device-id = <1>; 249 }; 250 251 i2c2: i2c@4819c000 { 252 #address-cells = <1>; 253 #size-cells = <0>; 254 compatible = "ti,i2c"; 255 reg =< 0x4819c000 0x1000 >; 256 interrupts = <30>; 257 interrupt-parent = <&AINTC>; 258 i2c-device-id = <2>; 259 }; 260 261 pwm@48300000 { 262 compatible = "ti,am335x-pwm"; 263 #address-cells = <1>; 264 #size-cells = <1>; 265 reg = < 0x48300000 0x100 /* PWMSS0 */ 266 0x48300100 0x80 /* eCAP0 */ 267 0x48300180 0x80 /* eQEP0 */ 268 0x48300200 0x60 /* ePWM0 */ 269 >; 270 interrupts = <86 58>; /* ePWM0INT, ePWM0_TZINT */ 271 interrupt-parent = <&AINTC>; 272 pwm-device-id = <0>; 273 }; 274 275 pwm@48302000 { 276 compatible = "ti,am335x-pwm"; 277 #address-cells = <1>; 278 #size-cells = <1>; 279 reg = < 0x48302000 0x100 /* PWMSS1 */ 280 0x48302100 0x80 /* eCAP1 */ 281 0x48302180 0x80 /* eQEP1 */ 282 0x48302200 0x60 /* ePWM1 */ 283 >; 284 interrupts = <87 59>; /* ePWM1INT, ePWM1_TZINT */ 285 interrupt-parent = <&AINTC>; 286 pwm-device-id = <1>; 287 }; 288 289 pwm@48304000 { 290 compatible = "ti,am335x-pwm"; 291 #address-cells = <1>; 292 #size-cells = <1>; 293 reg = < 0x48304000 0x100 /* PWMSS2 */ 294 0x48304100 0x80 /* eCAP2 */ 295 0x48304180 0x80 /* eQEP2 */ 296 0x48304200 0x60 /* ePWM2 */ 297 >; 298 interrupts = <88 60>; /* ePWM2INT, ePWM2_TZINT */ 299 interrupt-parent = <&AINTC>; 300 pwm-device-id = <2>; 301 }; 302 303 lcd: lcd@4830e000 { 304 #address-cells = <1>; 305 #size-cells = <0>; 306 compatible = "ti,am335x-lcd"; 307 reg =< 0x4830e000 0x1000 >; 308 interrupts = <36>; 309 interrupt-parent = <&AINTC>; 310 }; 311 312 usb@47400000 { 313 #address-cells = <1>; 314 #size-cells = <0>; 315 compatible = "ti,musb-am33xx"; 316 reg =< 0x47400000 0x1000 /* USBSS */ 317 0x47401000 0x300 /* USB0 */ 318 0x47401300 0x100 /* USB0_PHY */ 319 0x47401400 0x400 /* USB0_CORE */ 320 0x47401800 0x300 /* USB1 */ 321 0x47401B00 0x100 /* USB1_PHY */ 322 0x47401C00 0x400 /* USB1_CORE */ 323 >; 324 interrupts = <17 18 19>; 325 interrupt-parent = <&AINTC>; 326 /* 1 - Host Mode, 0 - Device Mode */ 327 modemask = <2>; 328 }; 329 330 mbox0@480C8000 { 331 compatible = "am335x,system-mbox"; 332 reg = < 0x480C8000 0x1000 >; 333 interrupts = <77>; 334 interrupt-parent = <&AINTC>; 335 }; 336 337 spinlock0@480CA000 { 338 compatible = "am335x,spinlock"; 339 reg = < 0x480CA000 0x1000 >; 340 }; 341 342 pruss@4A300000 { 343 compatible = "ti,pruss-v2"; 344 reg = <0x4A300000 0x80000>; 345 interrupt-parent = <&AINTC>; 346 interrupts = <20 21 22 23 24 25 26 27>; 347 }; 348 }; 349}; 350