1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 /* 29 * PCI nexus utility routines: 30 * property and config routines for attach() 31 * reg/intr/range/assigned-address property routines for bus_map() 32 * init_child() 33 * fault handling 34 */ 35 36 #include <sys/types.h> 37 #include <sys/kmem.h> 38 #include <sys/async.h> 39 #include <sys/sysmacros.h> 40 #include <sys/sunddi.h> 41 #include <sys/sunndi.h> 42 #include <sys/ddi_impldefs.h> 43 #include "px_obj.h" 44 #include "pcie_pwr.h" 45 46 /*LINTLIBRARY*/ 47 48 /* 49 * px_get_props 50 * 51 * This function is called from the attach routine to get the key 52 * properties of the pci nodes. 53 * 54 * used by: px_attach() 55 * 56 * return value: DDI_FAILURE on failure 57 */ 58 int 59 px_get_props(px_t *px_p, dev_info_t *dip) 60 { 61 int i, no_of_intrs; 62 63 /* 64 * Get the bus-ranges property. 65 */ 66 i = sizeof (px_p->px_bus_range); 67 if (ddi_getlongprop_buf(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 68 "bus-range", (caddr_t)&px_p->px_bus_range, &i) != DDI_SUCCESS) { 69 cmn_err(CE_WARN, "%s%d: no bus-range property\n", 70 ddi_driver_name(dip), ddi_get_instance(dip)); 71 return (DDI_FAILURE); 72 } 73 DBG(DBG_ATTACH, dip, "get_px_properties: bus-range (%x,%x)\n", 74 px_p->px_bus_range.lo, px_p->px_bus_range.hi); 75 76 /* 77 * Get the interrupts property. 78 */ 79 if (ddi_getlongprop(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 80 "interrupts", (caddr_t)&px_p->px_inos, 81 &px_p->px_inos_len) != DDI_SUCCESS) { 82 83 cmn_err(CE_WARN, "%s%d: no interrupts property\n", 84 ddi_driver_name(dip), ddi_get_instance(dip)); 85 return (DDI_FAILURE); 86 } 87 88 /* 89 * figure out number of interrupts in the "interrupts" property 90 * and convert them all into ino. 91 */ 92 i = ddi_getprop(DDI_DEV_T_ANY, dip, 0, "#interrupt-cells", 1); 93 i = CELLS_1275_TO_BYTES(i); 94 no_of_intrs = px_p->px_inos_len / i; 95 for (i = 0; i < no_of_intrs; i++) 96 px_p->px_inos[i] = px_p->px_inos[i] & 0x3F; 97 98 /* 99 * Get the ranges property. 100 */ 101 if (ddi_getlongprop(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, "ranges", 102 (caddr_t)&px_p->px_ranges_p, &px_p->px_ranges_length) != 103 DDI_SUCCESS) { 104 105 cmn_err(CE_WARN, "%s%d: no ranges property\n", 106 ddi_driver_name(dip), ddi_get_instance(dip)); 107 kmem_free(px_p->px_inos, px_p->px_inos_len); 108 return (DDI_FAILURE); 109 } 110 111 return (DDI_SUCCESS); 112 } 113 114 /* 115 * px_free_props: 116 * 117 * This routine frees the memory used to cache the "interrupts" 118 * and "ranges" properties of the pci bus device node. 119 * 120 * used by: px_detach() 121 * 122 * return value: none 123 */ 124 void 125 px_free_props(px_t *px_p) 126 { 127 kmem_free(px_p->px_inos, px_p->px_inos_len); 128 kmem_free(px_p->px_ranges_p, px_p->px_ranges_length); 129 } 130 131 /* 132 * px_reloc_reg 133 * 134 * If the "reg" entry (*px_rp) is relocatable, lookup "assigned-addresses" 135 * property to fetch corresponding relocated address. 136 * 137 * used by: px_map() 138 * 139 * return value: 140 * 141 * DDI_SUCCESS - on success 142 * DDI_ME_INVAL - regspec is invalid 143 */ 144 int 145 px_reloc_reg(dev_info_t *dip, dev_info_t *rdip, px_t *px_p, 146 pci_regspec_t *rp) 147 { 148 int assign_len, assign_entries, i; 149 pci_regspec_t *assign_p; 150 uint32_t phys_hi = rp->pci_phys_hi; 151 uint32_t space_type = phys_hi & PCI_REG_ADDR_M; /* 28-bit */ 152 153 DBG(DBG_MAP | DBG_CONT, dip, "\tpx_reloc_reg fr: %x.%x.%x %x.%x\n", 154 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, 155 rp->pci_size_hi, rp->pci_size_low); 156 157 if (space_type == PCI_ADDR_CONFIG || phys_hi & PCI_RELOCAT_B) 158 return (DDI_SUCCESS); 159 160 /* 161 * Hot plug will be taken care of later 162 * if (px_p->hotplug_capable == B_FALSE) 163 */ 164 { 165 uint32_t bus = PCI_REG_BUS_G(phys_hi); 166 if (bus < px_p->px_bus_range.lo || 167 bus > px_p->px_bus_range.hi) { 168 DBG(DBG_MAP | DBG_CONT, dip, "bad bus# (%x)\n", bus); 169 return (DDI_ME_INVAL); 170 } 171 } 172 173 i = ddi_getlongprop(DDI_DEV_T_ANY, rdip, DDI_PROP_DONTPASS, 174 "assigned-addresses", (caddr_t)&assign_p, &assign_len); 175 if (i) { 176 DBG(DBG_MAP | DBG_CONT, dip, "%s%d: assigned-addresses %d\n", 177 ddi_driver_name(rdip), ddi_get_instance(rdip), i); 178 return (DDI_ME_INVAL); 179 } 180 181 assign_entries = assign_len / sizeof (pci_regspec_t); 182 for (i = 0; i < assign_entries; i++, assign_p++) { 183 uint32_t assign_type = assign_p->pci_phys_hi & PCI_REG_ADDR_M; 184 uint32_t assign_addr = PCI_REG_BDFR_G(assign_p->pci_phys_hi); 185 186 if (PCI_REG_BDFR_G(phys_hi) != assign_addr) 187 continue; 188 if (space_type == assign_type) { /* exact match */ 189 rp->pci_phys_low += assign_p->pci_phys_low; 190 break; 191 } 192 if (space_type == PCI_ADDR_MEM64 && 193 assign_type == PCI_ADDR_MEM32) { 194 rp->pci_phys_low += assign_p->pci_phys_low; 195 rp->pci_phys_hi ^= PCI_ADDR_MEM64 ^ PCI_ADDR_MEM32; 196 break; 197 } 198 } 199 kmem_free(assign_p - i, assign_len); 200 DBG(DBG_MAP | DBG_CONT, dip, "\tpx_reloc_reg to: %x.%x.%x %x.%x <%d>\n", 201 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, 202 rp->pci_size_hi, rp->pci_size_low, i); 203 return (i < assign_entries ? DDI_SUCCESS : DDI_ME_INVAL); 204 } 205 206 /* 207 * use "ranges" to translate relocated pci regspec into parent space 208 */ 209 int 210 px_xlate_reg(px_t *px_p, pci_regspec_t *px_rp, struct regspec *new_rp) 211 { 212 int n; 213 px_ranges_t *rng_p = px_p->px_ranges_p; 214 int rng_n = px_p->px_ranges_length / sizeof (px_ranges_t); 215 216 uint32_t space_type = PCI_REG_ADDR_G(px_rp->pci_phys_hi); 217 uint32_t reg_end, reg_begin = px_rp->pci_phys_low; 218 uint32_t sz = px_rp->pci_size_low; 219 220 uint32_t rng_begin, rng_end; 221 222 if (space_type == PCI_REG_ADDR_G(PCI_ADDR_CONFIG)) { 223 if (reg_begin > PCI_CONF_HDR_SIZE) 224 return (DDI_ME_INVAL); 225 sz = sz ? MIN(sz, PCI_CONF_HDR_SIZE) : PCI_CONF_HDR_SIZE; 226 reg_begin += px_rp->pci_phys_hi << 4; 227 } 228 reg_end = reg_begin + sz - 1; 229 230 for (n = 0; n < rng_n; n++, rng_p++) { 231 if (space_type != PCI_REG_ADDR_G(rng_p->child_high)) 232 continue; /* not the same space type */ 233 234 rng_begin = rng_p->child_low; 235 if (space_type == PCI_REG_ADDR_G(PCI_ADDR_CONFIG)) 236 rng_begin += rng_p->child_high; 237 238 rng_end = rng_begin + rng_p->size_low - 1; 239 if (reg_begin >= rng_begin && reg_end <= rng_end) 240 break; 241 } 242 if (n >= rng_n) 243 return (DDI_ME_REGSPEC_RANGE); 244 245 new_rp->regspec_addr = reg_begin - rng_begin + rng_p->parent_low; 246 new_rp->regspec_bustype = rng_p->parent_high; 247 new_rp->regspec_size = sz; 248 DBG(DBG_MAP | DBG_CONT, px_p->px_dip, 249 "\tpx_xlate_reg: entry %d new_rp %x.%x %x\n", 250 n, new_rp->regspec_bustype, new_rp->regspec_addr, sz); 251 252 return (DDI_SUCCESS); 253 } 254 255 /* 256 * px_report_dev 257 * 258 * This function is called from our control ops routine on a 259 * DDI_CTLOPS_REPORTDEV request. 260 * 261 * The display format is 262 * 263 * <name><inst> at <pname><pinst> device <dev> function <func> 264 * 265 * where 266 * 267 * <name> this device's name property 268 * <inst> this device's instance number 269 * <name> parent device's name property 270 * <inst> parent device's instance number 271 * <dev> this device's device number 272 * <func> this device's function number 273 */ 274 int 275 px_report_dev(dev_info_t *dip) 276 { 277 if (dip == (dev_info_t *)0) 278 return (DDI_FAILURE); 279 cmn_err(CE_CONT, "?PCI Express-device: %s@%s, %s%d\n", 280 ddi_node_name(dip), ddi_get_name_addr(dip), 281 ddi_driver_name(dip), 282 ddi_get_instance(dip)); 283 return (DDI_SUCCESS); 284 } 285 286 287 /* 288 * reg property for pcimem nodes that covers the entire address 289 * space for the node: config, io, or memory. 290 */ 291 pci_regspec_t pci_pcimem_reg[3] = 292 { 293 {PCI_ADDR_CONFIG, 0, 0, 0, 0x800000 }, 294 {(uint_t)(PCI_ADDR_IO|PCI_RELOCAT_B), 0, 0, 0, PX_IO_SIZE }, 295 {(uint_t)(PCI_ADDR_MEM32|PCI_RELOCAT_B), 0, 0, 0, PX_MEM_SIZE } 296 }; 297 298 /* 299 * px_name_child 300 * 301 * This function is called from init_child to name a node. It is 302 * also passed as a callback for node merging functions. 303 * 304 * return value: DDI_SUCCESS, DDI_FAILURE 305 */ 306 static int 307 px_name_child(dev_info_t *child, char *name, int namelen) 308 { 309 pci_regspec_t *pci_rp; 310 int reglen; 311 uint_t func; 312 char **unit_addr; 313 uint_t n; 314 315 /* 316 * Set the address portion of the node name based on 317 * unit-address property, if it exists. 318 * The interpretation of the unit-address is DD[,F] 319 * where DD is the device id and F is the function. 320 */ 321 if (ddi_prop_lookup_string_array(DDI_DEV_T_ANY, child, 322 DDI_PROP_DONTPASS, "unit-address", &unit_addr, &n) == 323 DDI_PROP_SUCCESS) { 324 if (n != 1 || *unit_addr == NULL || **unit_addr == 0) { 325 cmn_err(CE_WARN, "unit-address property in %s.conf" 326 " not well-formed", ddi_driver_name(child)); 327 ddi_prop_free(unit_addr); 328 return (DDI_FAILURE); 329 } 330 (void) snprintf(name, namelen, "%s", *unit_addr); 331 ddi_prop_free(unit_addr); 332 return (DDI_SUCCESS); 333 } 334 335 /* 336 * The unit-address property is does not exist. Set the address 337 * portion of the node name based on the function and device number. 338 */ 339 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, child, DDI_PROP_DONTPASS, 340 "reg", (int **)&pci_rp, (uint_t *)®len) == DDI_SUCCESS) { 341 if (((reglen * sizeof (int)) % sizeof (pci_regspec_t)) != 0) { 342 cmn_err(CE_WARN, "reg property not well-formed"); 343 return (DDI_FAILURE); 344 } 345 346 func = PCI_REG_FUNC_G(pci_rp[0].pci_phys_hi); 347 if (func != 0) 348 (void) snprintf(name, namelen, "%x,%x", 349 PCI_REG_DEV_G(pci_rp[0].pci_phys_hi), func); 350 else 351 (void) snprintf(name, namelen, "%x", 352 PCI_REG_DEV_G(pci_rp[0].pci_phys_hi)); 353 ddi_prop_free(pci_rp); 354 return (DDI_SUCCESS); 355 } 356 357 cmn_err(CE_WARN, "cannot name pci child '%s'", ddi_node_name(child)); 358 return (DDI_FAILURE); 359 } 360 361 int 362 px_uninit_child(px_t *px_p, dev_info_t *child) 363 { 364 DBG(DBG_INIT_CLD, px_p->px_dip, 365 "DDI_CTLOPS_UNINITCHILD: arg=%s%d\n", 366 ddi_driver_name(child), ddi_get_instance(child)); 367 368 ddi_set_name_addr(child, NULL); 369 ddi_remove_minor_node(child, NULL); 370 impl_rem_dev_props(child); 371 372 DBG(DBG_PWR, ddi_get_parent(child), "\n\n"); 373 374 pcie_uninitchild(child); 375 376 return (DDI_SUCCESS); 377 } 378 379 /* 380 * px_init_child 381 * 382 * This function is called from our control ops routine on a 383 * DDI_CTLOPS_INITCHILD request. It builds and sets the device's 384 * parent private data area. 385 * 386 * used by: pci_ctlops() 387 * 388 * return value: none 389 */ 390 int 391 px_init_child(px_t *px_p, dev_info_t *child) 392 { 393 dev_info_t *parent_dip = px_p->px_dip; 394 pci_regspec_t *pci_rp; 395 char name[10]; 396 int i, no_config; 397 398 /* 399 * The following is a special case for pcimem nodes. 400 * For these nodes we create a reg property with a 401 * single entry that covers the entire address space 402 * for the node (config, io or memory). 403 */ 404 if (strcmp(ddi_driver_name(child), "pcimem") == 0) { 405 (void) ddi_prop_create(DDI_DEV_T_NONE, child, 406 DDI_PROP_CANSLEEP, "reg", (caddr_t)pci_pcimem_reg, 407 sizeof (pci_pcimem_reg)); 408 ddi_set_name_addr(child, "0"); 409 ddi_set_parent_data(child, NULL); 410 return (DDI_SUCCESS); 411 } 412 413 /* 414 * Check whether the node has config space or is a hard decode 415 * node (possibly created by a driver.conf file). 416 */ 417 no_config = ddi_prop_get_int(DDI_DEV_T_ANY, child, DDI_PROP_DONTPASS, 418 "no-config", 0); 419 420 /* 421 * Pseudo nodes indicate a prototype node with per-instance 422 * properties to be merged into the real h/w device node. 423 * However, do not merge if the no-config property is set 424 * (see PSARC 2000/088). 425 */ 426 if ((ndi_dev_is_persistent_node(child) == 0) && (no_config == 0)) { 427 extern int pci_allow_pseudo_children; 428 429 if (ddi_getlongprop(DDI_DEV_T_ANY, child, 430 DDI_PROP_DONTPASS, "reg", (caddr_t)&pci_rp, &i) == 431 DDI_SUCCESS) { 432 cmn_err(CE_WARN, "cannot merge prototype from %s.conf", 433 ddi_driver_name(child)); 434 kmem_free(pci_rp, i); 435 return (DDI_NOT_WELL_FORMED); 436 } 437 /* 438 * Name the child 439 */ 440 if (px_name_child(child, name, 10) != DDI_SUCCESS) 441 return (DDI_FAILURE); 442 443 ddi_set_name_addr(child, name); 444 ddi_set_parent_data(child, NULL); 445 446 /* 447 * Try to merge the properties from this prototype 448 * node into real h/w nodes. 449 */ 450 if (ndi_merge_node(child, px_name_child) == DDI_SUCCESS) { 451 /* 452 * Merged ok - return failure to remove the node. 453 */ 454 ddi_set_name_addr(child, NULL); 455 return (DDI_FAILURE); 456 } 457 458 /* workaround for ddivs to run under PCI */ 459 if (pci_allow_pseudo_children) 460 return (DDI_SUCCESS); 461 462 cmn_err(CE_WARN, "!%s@%s: %s.conf properties not merged", 463 ddi_driver_name(child), ddi_get_name_addr(child), 464 ddi_driver_name(child)); 465 ddi_set_name_addr(child, NULL); 466 return (DDI_NOT_WELL_FORMED); 467 } 468 469 if (px_name_child(child, name, 10) != DDI_SUCCESS) 470 return (DDI_FAILURE); 471 ddi_set_name_addr(child, name); 472 473 if (no_config != 0) { 474 /* 475 * There is no config space so there's nothing more to do. 476 */ 477 return (DDI_SUCCESS); 478 } 479 480 if (pcie_pm_hold(parent_dip) != DDI_SUCCESS) { 481 DBG(DBG_PWR, parent_dip, 482 "INITCHILD: px_pm_hold failed\n"); 483 return (DDI_FAILURE); 484 } 485 /* Any return of DDI_FAILURE after this must call px_pm_release */ 486 487 /* 488 * If configuration registers were previously saved by 489 * child (before it went to D3), then let the child do the 490 * restore to set up the config regs as it'll first need to 491 * power the device out of D3. 492 */ 493 if (ddi_prop_exists(DDI_DEV_T_ANY, child, DDI_PROP_DONTPASS, 494 "config-regs-saved-by-child") == 1) { 495 DBG(DBG_PWR, child, 496 "INITCHILD: config regs to be restored by child\n"); 497 498 return (DDI_SUCCESS); 499 } 500 501 DBG(DBG_PWR, parent_dip, 502 "INITCHILD: config regs setup for %s@%s\n", 503 ddi_node_name(child), ddi_get_name_addr(child)); 504 505 pcie_initchild(child); 506 507 /* 508 * Handle chip specific init-child tasks. 509 */ 510 pcie_pm_release(parent_dip); 511 512 return (DDI_SUCCESS); 513 } 514 515 /* 516 * px_get_reg_set_size 517 * 518 * Given a dev info pointer to a pci child and a register number, this 519 * routine returns the size element of that reg set property. 520 * 521 * used by: pci_ctlops() - DDI_CTLOPS_REGSIZE 522 * 523 * return value: size of reg set on success, 0 on error 524 */ 525 off_t 526 px_get_reg_set_size(dev_info_t *child, int rnumber) 527 { 528 pci_regspec_t *pci_rp; 529 off_t size = 0; 530 int i; 531 532 if (rnumber < 0) 533 return (0); 534 535 /* 536 * Get the reg property for the device. 537 */ 538 if (ddi_getlongprop(DDI_DEV_T_ANY, child, DDI_PROP_DONTPASS, "reg", 539 (caddr_t)&pci_rp, &i) != DDI_SUCCESS) 540 return (0); 541 542 if (rnumber >= (i / (int)sizeof (pci_regspec_t))) 543 goto done; 544 545 size = pci_rp[rnumber].pci_size_low | 546 ((uint64_t)pci_rp[rnumber].pci_size_hi << 32); 547 done: 548 kmem_free(pci_rp, i); 549 return (size); 550 } 551 552 553 /* 554 * px_get_nreg_set 555 * 556 * Given a dev info pointer to a pci child, this routine returns the 557 * number of sets in its "reg" property. 558 * 559 * used by: pci_ctlops() - DDI_CTLOPS_NREGS 560 * 561 * return value: # of reg sets on success, zero on error 562 */ 563 uint_t 564 px_get_nreg_set(dev_info_t *child) 565 { 566 pci_regspec_t *pci_rp; 567 int i, n; 568 569 /* 570 * Get the reg property for the device. 571 */ 572 if (ddi_getlongprop(DDI_DEV_T_ANY, child, DDI_PROP_DONTPASS, "reg", 573 (caddr_t)&pci_rp, &i) != DDI_SUCCESS) 574 return (0); 575 576 n = i / (int)sizeof (pci_regspec_t); 577 kmem_free(pci_rp, i); 578 return (n); 579 } 580 581 582 /* 583 * px_get_nintr 584 * 585 * Given a dev info pointer to a pci child, this routine returns the 586 * number of items in its "interrupts" property. 587 * 588 * used by: pci_ctlops() - DDI_CTLOPS_NREGS 589 * 590 * return value: # of interrupts on success, zero on error 591 */ 592 uint_t 593 px_get_nintr(dev_info_t *child) 594 { 595 int *pci_ip; 596 int i, n; 597 598 if (ddi_getlongprop(DDI_DEV_T_ANY, child, DDI_PROP_DONTPASS, 599 "interrupts", (caddr_t)&pci_ip, &i) != DDI_SUCCESS) 600 return (0); 601 602 n = i / (int)sizeof (uint_t); 603 kmem_free(pci_ip, i); 604 return (n); 605 } 606 607 uint64_t 608 px_get_cfg_pabase(px_t *px_p) 609 { 610 int i; 611 px_ranges_t *rangep = px_p->px_ranges_p; 612 int nrange = px_p->px_ranges_length / sizeof (px_ranges_t); 613 uint32_t cfg_space_type = PCI_REG_ADDR_G(PCI_ADDR_CONFIG); 614 615 ASSERT(cfg_space_type == 0); 616 617 for (i = 0; i < nrange; i++, rangep++) { 618 if (PCI_REG_ADDR_G(rangep->child_high) == cfg_space_type) 619 break; 620 } 621 622 if (i >= nrange) 623 cmn_err(CE_PANIC, "no cfg space in px(%p) ranges prop.\n", 624 px_p); 625 626 return (((uint64_t)rangep->parent_high << 32) | rangep->parent_low); 627 } 628 629 /* 630 * decodes standard PCI config space 16bit error status reg 631 */ 632 int 633 px_log_cfg_err(dev_info_t *dip, ushort_t status_reg, char *err_msg) 634 { 635 int nerr = ddi_get_instance(dip); /* temp for instance */ 636 uint64_t perr_fatal = px_perr_fatal & (1 << nerr); 637 uint64_t serr_fatal = px_serr_fatal & (1 << nerr); 638 nerr = 0; 639 640 if ((status_reg & PCI_STAT_PERROR) && perr_fatal) 641 nerr++; 642 if ((status_reg & PCI_STAT_S_SYSERR) && serr_fatal) 643 nerr++; 644 if (status_reg & PCI_STAT_R_MAST_AB) 645 nerr++; 646 if ((status_reg & PCI_STAT_S_PERROR) && perr_fatal) 647 nerr++; 648 649 cmn_err(CE_WARN, "%s%d: %sPCI Express config space CSR=0x%b", 650 ddi_driver_name(dip), ddi_get_instance(dip), err_msg, 651 (uint32_t)status_reg, PX_STATUS_BITS); 652 653 return (nerr); 654 } 655 656 /* 657 * This is a software workaround to fix the Broadcom PCIe-PCI bridge 658 * prefetch bug. Existence of a "cross-page-prefetch" property in the 659 * child or parent node means the px nexus driver has to allocate an 660 * extra page and make it valid one, for any DVMA request that comes 661 * from any of the Broadcom child device. 662 */ 663 boolean_t 664 px_child_prefetch(dev_info_t *child) 665 { 666 if (ddi_prop_exists(DDI_DEV_T_ANY, child, DDI_PROP_NOTPROM, 667 "cross-page-prefetch")) 668 return (B_TRUE); 669 670 return (B_FALSE); 671 } 672