xref: /linux/tools/testing/selftests/rseq/rseq-s390.h (revision 7fc2cd2e4b398c57c9cf961cfea05eadbf34c05c)
1 /* SPDX-License-Identifier: LGPL-2.1 OR MIT */
2 
3 /*
4  * RSEQ_SIG uses the trap4 instruction. As Linux does not make use of the
5  * access-register mode nor the linkage stack this instruction will always
6  * cause a special-operation exception (the trap-enabled bit in the DUCT
7  * is and will stay 0). The instruction pattern is
8  *	b2 ff 0f ff	trap4	4095(%r0)
9  */
10 #define RSEQ_SIG	0xB2FF0FFF
11 
12 #define rseq_smp_mb()	__asm__ __volatile__ ("bcr 15,0" ::: "memory")
13 #define rseq_smp_rmb()	rseq_smp_mb()
14 #define rseq_smp_wmb()	rseq_smp_mb()
15 
16 #define rseq_smp_load_acquire(p)					\
17 __extension__ ({							\
18 	rseq_unqual_scalar_typeof(*(p)) ____p1 = RSEQ_READ_ONCE(*(p));	\
19 	rseq_barrier();							\
20 	____p1;								\
21 })
22 
23 #define rseq_smp_acquire__after_ctrl_dep()	rseq_smp_rmb()
24 
25 #define rseq_smp_store_release(p, v)					\
26 do {									\
27 	rseq_barrier();							\
28 	RSEQ_WRITE_ONCE(*(p), v);					\
29 } while (0)
30 
31 #define LONG_L			"lg"
32 #define LONG_S			"stg"
33 #define LONG_LT_R		"ltgr"
34 #define LONG_CMP		"cg"
35 #define LONG_CMP_R		"cgr"
36 #define LONG_ADDI		"aghi"
37 #define LONG_ADD_R		"agr"
38 
39 #define __RSEQ_ASM_DEFINE_TABLE(label, version, flags,			\
40 				start_ip, post_commit_offset, abort_ip)	\
41 		".pushsection __rseq_cs, \"aw\"\n\t"			\
42 		".balign 32\n\t"					\
43 		__rseq_str(label) ":\n\t"				\
44 		".long " __rseq_str(version) ", " __rseq_str(flags) "\n\t" \
45 		".quad " __rseq_str(start_ip) ", " __rseq_str(post_commit_offset) ", " __rseq_str(abort_ip) "\n\t" \
46 		".popsection\n\t"					\
47 		".pushsection __rseq_cs_ptr_array, \"aw\"\n\t"		\
48 		".quad " __rseq_str(label) "b\n\t"			\
49 		".popsection\n\t"
50 
51 /*
52  * Exit points of a rseq critical section consist of all instructions outside
53  * of the critical section where a critical section can either branch to or
54  * reach through the normal course of its execution. The abort IP and the
55  * post-commit IP are already part of the __rseq_cs section and should not be
56  * explicitly defined as additional exit points. Knowing all exit points is
57  * useful to assist debuggers stepping over the critical section.
58  */
59 #define RSEQ_ASM_DEFINE_EXIT_POINT(start_ip, exit_ip)			\
60 		".pushsection __rseq_exit_point_array, \"aw\"\n\t"	\
61 		".quad " __rseq_str(start_ip) ", " __rseq_str(exit_ip) "\n\t" \
62 		".popsection\n\t"
63 
64 #define RSEQ_ASM_DEFINE_TABLE(label, start_ip, post_commit_ip, abort_ip) \
65 	__RSEQ_ASM_DEFINE_TABLE(label, 0x0, 0x0, start_ip,		\
66 				(post_commit_ip - start_ip), abort_ip)
67 
68 #define RSEQ_ASM_STORE_RSEQ_CS(label, cs_label, rseq_cs)		\
69 		RSEQ_INJECT_ASM(1)					\
70 		"larl %%r0, " __rseq_str(cs_label) "\n\t"		\
71 		LONG_S " %%r0, %[" __rseq_str(rseq_cs) "]\n\t"		\
72 		__rseq_str(label) ":\n\t"
73 
74 #define RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, label)		\
75 		RSEQ_INJECT_ASM(2)					\
76 		"c %[" __rseq_str(cpu_id) "], %[" __rseq_str(current_cpu_id) "]\n\t" \
77 		"jnz " __rseq_str(label) "\n\t"
78 
79 #define RSEQ_ASM_DEFINE_ABORT(label, teardown, abort_label)		\
80 		".pushsection __rseq_failure, \"ax\"\n\t"		\
81 		".long " __rseq_str(RSEQ_SIG) "\n\t"			\
82 		__rseq_str(label) ":\n\t"				\
83 		teardown						\
84 		"jg %l[" __rseq_str(abort_label) "]\n\t"		\
85 		".popsection\n\t"
86 
87 #define RSEQ_ASM_DEFINE_CMPFAIL(label, teardown, cmpfail_label)		\
88 		".pushsection __rseq_failure, \"ax\"\n\t"		\
89 		__rseq_str(label) ":\n\t"				\
90 		teardown						\
91 		"jg %l[" __rseq_str(cmpfail_label) "]\n\t"		\
92 		".popsection\n\t"
93 
94 /* Per-cpu-id indexing. */
95 
96 #define RSEQ_TEMPLATE_CPU_ID
97 #define RSEQ_TEMPLATE_MO_RELAXED
98 #include "rseq-s390-bits.h"
99 #undef RSEQ_TEMPLATE_MO_RELAXED
100 
101 #define RSEQ_TEMPLATE_MO_RELEASE
102 #include "rseq-s390-bits.h"
103 #undef RSEQ_TEMPLATE_MO_RELEASE
104 #undef RSEQ_TEMPLATE_CPU_ID
105 
106 /* Per-mm-cid indexing. */
107 
108 #define RSEQ_TEMPLATE_MM_CID
109 #define RSEQ_TEMPLATE_MO_RELAXED
110 #include "rseq-s390-bits.h"
111 #undef RSEQ_TEMPLATE_MO_RELAXED
112 
113 #define RSEQ_TEMPLATE_MO_RELEASE
114 #include "rseq-s390-bits.h"
115 #undef RSEQ_TEMPLATE_MO_RELEASE
116 #undef RSEQ_TEMPLATE_MM_CID
117 
118 /* APIs which are not based on cpu ids. */
119 
120 #define RSEQ_TEMPLATE_CPU_ID_NONE
121 #define RSEQ_TEMPLATE_MO_RELAXED
122 #include "rseq-s390-bits.h"
123 #undef RSEQ_TEMPLATE_MO_RELAXED
124 #undef RSEQ_TEMPLATE_CPU_ID_NONE
125