1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2023 Ventana Micro Systems Inc. 4 * 5 * Run with 'taskset -c <cpu-list> cbo' to only execute hwprobe on a 6 * subset of cpus, as well as only executing the tests on those cpus. 7 */ 8 #define _GNU_SOURCE 9 #include <stdbool.h> 10 #include <stdint.h> 11 #include <string.h> 12 #include <sched.h> 13 #include <signal.h> 14 #include <assert.h> 15 #include <linux/compiler.h> 16 #include <linux/kernel.h> 17 #include <asm/ucontext.h> 18 19 #include "hwprobe.h" 20 #include "../../kselftest.h" 21 22 #define MK_CBO(fn) le32_bswap((uint32_t)(fn) << 20 | 10 << 15 | 2 << 12 | 0 << 7 | 15) 23 24 static char mem[4096] __aligned(4096) = { [0 ... 4095] = 0xa5 }; 25 26 static bool illegal_insn; 27 28 static void sigill_handler(int sig, siginfo_t *info, void *context) 29 { 30 unsigned long *regs = (unsigned long *)&((ucontext_t *)context)->uc_mcontext; 31 uint32_t insn = *(uint32_t *)regs[0]; 32 33 assert(insn == MK_CBO(regs[11])); 34 35 illegal_insn = true; 36 regs[0] += 4; 37 } 38 39 #define cbo_insn(base, fn) \ 40 ({ \ 41 asm volatile( \ 42 "mv a0, %0\n" \ 43 "li a1, %1\n" \ 44 ".4byte %2\n" \ 45 : : "r" (base), "i" (fn), "i" (MK_CBO(fn)) : "a0", "a1", "memory"); \ 46 }) 47 48 static void cbo_inval(char *base) { cbo_insn(base, 0); } 49 static void cbo_clean(char *base) { cbo_insn(base, 1); } 50 static void cbo_flush(char *base) { cbo_insn(base, 2); } 51 static void cbo_zero(char *base) { cbo_insn(base, 4); } 52 53 static void test_no_cbo_inval(void *arg) 54 { 55 ksft_print_msg("Testing cbo.inval instruction remain privileged\n"); 56 illegal_insn = false; 57 cbo_inval(&mem[0]); 58 ksft_test_result(illegal_insn, "No cbo.inval\n"); 59 } 60 61 static void test_no_zicbom(void *arg) 62 { 63 ksft_print_msg("Testing Zicbom instructions remain privileged\n"); 64 65 illegal_insn = false; 66 cbo_clean(&mem[0]); 67 ksft_test_result(illegal_insn, "No cbo.clean\n"); 68 69 illegal_insn = false; 70 cbo_flush(&mem[0]); 71 ksft_test_result(illegal_insn, "No cbo.flush\n"); 72 } 73 74 static void test_no_zicboz(void *arg) 75 { 76 ksft_print_msg("No Zicboz, testing cbo.zero remains privileged\n"); 77 78 illegal_insn = false; 79 cbo_zero(&mem[0]); 80 ksft_test_result(illegal_insn, "No cbo.zero\n"); 81 } 82 83 static bool is_power_of_2(__u64 n) 84 { 85 return n != 0 && (n & (n - 1)) == 0; 86 } 87 88 static void test_zicbom(void *arg) 89 { 90 struct riscv_hwprobe pair = { 91 .key = RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE, 92 }; 93 cpu_set_t *cpus = (cpu_set_t *)arg; 94 __u64 block_size; 95 long rc; 96 97 rc = riscv_hwprobe(&pair, 1, sizeof(cpu_set_t), (unsigned long *)cpus, 0); 98 block_size = pair.value; 99 ksft_test_result(rc == 0 && pair.key == RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE && 100 is_power_of_2(block_size), "Zicbom block size\n"); 101 ksft_print_msg("Zicbom block size: %llu\n", block_size); 102 103 illegal_insn = false; 104 cbo_clean(&mem[block_size]); 105 ksft_test_result(!illegal_insn, "cbo.clean\n"); 106 107 illegal_insn = false; 108 cbo_flush(&mem[block_size]); 109 ksft_test_result(!illegal_insn, "cbo.flush\n"); 110 } 111 112 static void test_zicboz(void *arg) 113 { 114 struct riscv_hwprobe pair = { 115 .key = RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE, 116 }; 117 cpu_set_t *cpus = (cpu_set_t *)arg; 118 __u64 block_size; 119 int i, j; 120 long rc; 121 122 rc = riscv_hwprobe(&pair, 1, sizeof(cpu_set_t), (unsigned long *)cpus, 0); 123 block_size = pair.value; 124 ksft_test_result(rc == 0 && pair.key == RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE && 125 is_power_of_2(block_size), "Zicboz block size\n"); 126 ksft_print_msg("Zicboz block size: %llu\n", block_size); 127 128 illegal_insn = false; 129 cbo_zero(&mem[block_size]); 130 ksft_test_result(!illegal_insn, "cbo.zero\n"); 131 132 if (illegal_insn || !is_power_of_2(block_size)) { 133 ksft_test_result_skip("cbo.zero check\n"); 134 return; 135 } 136 137 assert(block_size <= 1024); 138 139 for (i = 0; i < 4096 / block_size; ++i) { 140 if (i % 2) 141 cbo_zero(&mem[i * block_size]); 142 } 143 144 for (i = 0; i < 4096 / block_size; ++i) { 145 char expected = i % 2 ? 0x0 : 0xa5; 146 147 for (j = 0; j < block_size; ++j) { 148 if (mem[i * block_size + j] != expected) { 149 ksft_test_result_fail("cbo.zero check\n"); 150 ksft_print_msg("cbo.zero check: mem[%llu] != 0x%x\n", 151 i * block_size + j, expected); 152 return; 153 } 154 } 155 } 156 157 ksft_test_result_pass("cbo.zero check\n"); 158 } 159 160 static void check_no_zicbo_cpus(cpu_set_t *cpus, __u64 cbo) 161 { 162 struct riscv_hwprobe pair = { 163 .key = RISCV_HWPROBE_KEY_IMA_EXT_0, 164 }; 165 cpu_set_t one_cpu; 166 int i = 0, c = 0; 167 long rc; 168 char *cbostr; 169 170 while (i++ < CPU_COUNT(cpus)) { 171 while (!CPU_ISSET(c, cpus)) 172 ++c; 173 174 CPU_ZERO(&one_cpu); 175 CPU_SET(c, &one_cpu); 176 177 rc = riscv_hwprobe(&pair, 1, sizeof(cpu_set_t), (unsigned long *)&one_cpu, 0); 178 assert(rc == 0 && pair.key == RISCV_HWPROBE_KEY_IMA_EXT_0); 179 180 cbostr = cbo == RISCV_HWPROBE_EXT_ZICBOZ ? "Zicboz" : "Zicbom"; 181 182 if (pair.value & cbo) 183 ksft_exit_fail_msg("%s is only present on a subset of harts.\n" 184 "Use taskset to select a set of harts where %s\n" 185 "presence (present or not) is consistent for each hart\n", 186 cbostr, cbostr); 187 ++c; 188 } 189 } 190 191 enum { 192 TEST_ZICBOZ, 193 TEST_NO_ZICBOZ, 194 TEST_ZICBOM, 195 TEST_NO_ZICBOM, 196 TEST_NO_CBO_INVAL, 197 }; 198 199 static struct test_info { 200 bool enabled; 201 unsigned int nr_tests; 202 void (*test_fn)(void *arg); 203 } tests[] = { 204 [TEST_ZICBOZ] = { .nr_tests = 3, test_zicboz }, 205 [TEST_NO_ZICBOZ] = { .nr_tests = 1, test_no_zicboz }, 206 [TEST_ZICBOM] = { .nr_tests = 3, test_zicbom }, 207 [TEST_NO_ZICBOM] = { .nr_tests = 2, test_no_zicbom }, 208 [TEST_NO_CBO_INVAL] = { .nr_tests = 1, test_no_cbo_inval }, 209 }; 210 211 int main(int argc, char **argv) 212 { 213 struct sigaction act = { 214 .sa_sigaction = &sigill_handler, 215 .sa_flags = SA_SIGINFO, 216 }; 217 struct riscv_hwprobe pair; 218 unsigned int plan = 0; 219 cpu_set_t cpus; 220 long rc; 221 int i; 222 223 if (argc > 1 && !strcmp(argv[1], "--sigill")) { 224 rc = sigaction(SIGILL, &act, NULL); 225 assert(rc == 0); 226 tests[TEST_NO_ZICBOZ].enabled = true; 227 tests[TEST_NO_ZICBOM].enabled = true; 228 tests[TEST_NO_CBO_INVAL].enabled = true; 229 } 230 231 rc = sched_getaffinity(0, sizeof(cpu_set_t), &cpus); 232 assert(rc == 0); 233 234 ksft_print_header(); 235 236 pair.key = RISCV_HWPROBE_KEY_IMA_EXT_0; 237 rc = riscv_hwprobe(&pair, 1, sizeof(cpu_set_t), (unsigned long *)&cpus, 0); 238 if (rc < 0) 239 ksft_exit_fail_msg("hwprobe() failed with %ld\n", rc); 240 assert(rc == 0 && pair.key == RISCV_HWPROBE_KEY_IMA_EXT_0); 241 242 if (pair.value & RISCV_HWPROBE_EXT_ZICBOZ) { 243 tests[TEST_ZICBOZ].enabled = true; 244 tests[TEST_NO_ZICBOZ].enabled = false; 245 } else { 246 check_no_zicbo_cpus(&cpus, RISCV_HWPROBE_EXT_ZICBOZ); 247 } 248 249 if (pair.value & RISCV_HWPROBE_EXT_ZICBOM) { 250 tests[TEST_ZICBOM].enabled = true; 251 tests[TEST_NO_ZICBOM].enabled = false; 252 } else { 253 check_no_zicbo_cpus(&cpus, RISCV_HWPROBE_EXT_ZICBOM); 254 } 255 256 for (i = 0; i < ARRAY_SIZE(tests); ++i) 257 plan += tests[i].enabled ? tests[i].nr_tests : 0; 258 259 if (plan == 0) 260 ksft_print_msg("No tests enabled.\n"); 261 else 262 ksft_set_plan(plan); 263 264 for (i = 0; i < ARRAY_SIZE(tests); ++i) { 265 if (tests[i].enabled) 266 tests[i].test_fn(&cpus); 267 } 268 269 ksft_finished(); 270 } 271