1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright 2022, Athira Rajeev, IBM Corp. 4 * Copyright 2022, Madhavan Srinivasan, IBM Corp. 5 * Copyright 2022, Kajol Jain, IBM Corp. 6 */ 7 8 #include <sys/stat.h> 9 #include "../event.h" 10 11 #define POWER10 0x80 12 #define POWER9 0x4e 13 #define PERF_POWER9_MASK 0x7f8ffffffffffff 14 #define PERF_POWER10_MASK 0x7ffffffffffffff 15 16 #define MMCR0_FC56 0x00000010UL /* freeze counters 5 and 6 */ 17 #define MMCR0_PMCCEXT 0x00000200UL /* PMCCEXT control */ 18 #define MMCR1_RSQ 0x200000000000ULL /* radix scope qual field */ 19 #define BHRB_DISABLE 0x2000000000ULL /* MMCRA BHRB DISABLE bit */ 20 21 extern int ev_mask_pmcxsel, ev_shift_pmcxsel; 22 extern int ev_mask_marked, ev_shift_marked; 23 extern int ev_mask_comb, ev_shift_comb; 24 extern int ev_mask_unit, ev_shift_unit; 25 extern int ev_mask_pmc, ev_shift_pmc; 26 extern int ev_mask_cache, ev_shift_cache; 27 extern int ev_mask_sample, ev_shift_sample; 28 extern int ev_mask_thd_sel, ev_shift_thd_sel; 29 extern int ev_mask_thd_start, ev_shift_thd_start; 30 extern int ev_mask_thd_stop, ev_shift_thd_stop; 31 extern int ev_mask_thd_cmp, ev_shift_thd_cmp; 32 extern int ev_mask_sm, ev_shift_sm; 33 extern int ev_mask_rsq, ev_shift_rsq; 34 extern int ev_mask_l2l3, ev_shift_l2l3; 35 extern int ev_mask_mmcr3_src, ev_shift_mmcr3_src; 36 extern int pvr; 37 extern u64 platform_extended_mask; 38 extern int check_pvr_for_sampling_tests(void); 39 extern int platform_check_for_tests(void); 40 41 /* 42 * Event code field extraction macro. 43 * Raw event code is combination of multiple 44 * fields. Macro to extract individual fields 45 * 46 * x - Raw event code value 47 * y - Field to extract 48 */ 49 #define EV_CODE_EXTRACT(x, y) \ 50 ((x >> ev_shift_##y) & ev_mask_##y) 51 52 void *event_sample_buf_mmap(int fd, int mmap_pages); 53 void *__event_read_samples(void *sample_buff, size_t *size, u64 *sample_count); 54 int collect_samples(void *sample_buff); 55 u64 *get_intr_regs(struct event *event, void *sample_buff); 56 u64 get_reg_value(u64 *intr_regs, char *register_name); 57 int get_thresh_cmp_val(struct event event); 58 bool check_for_generic_compat_pmu(void); 59 bool check_for_compat_mode(void); 60 61 static inline int get_mmcr0_fc56(u64 mmcr0, int pmc) 62 { 63 return (mmcr0 & MMCR0_FC56); 64 } 65 66 static inline int get_mmcr0_pmccext(u64 mmcr0, int pmc) 67 { 68 return (mmcr0 & MMCR0_PMCCEXT); 69 } 70 71 static inline int get_mmcr0_pmao(u64 mmcr0, int pmc) 72 { 73 return ((mmcr0 >> 7) & 0x1); 74 } 75 76 static inline int get_mmcr0_cc56run(u64 mmcr0, int pmc) 77 { 78 return ((mmcr0 >> 8) & 0x1); 79 } 80 81 static inline int get_mmcr0_pmcjce(u64 mmcr0, int pmc) 82 { 83 return ((mmcr0 >> 14) & 0x1); 84 } 85 86 static inline int get_mmcr0_pmc1ce(u64 mmcr0, int pmc) 87 { 88 return ((mmcr0 >> 15) & 0x1); 89 } 90 91 static inline int get_mmcr0_pmae(u64 mmcr0, int pmc) 92 { 93 return ((mmcr0 >> 27) & 0x1); 94 } 95 96 static inline int get_mmcr1_pmcxsel(u64 mmcr1, int pmc) 97 { 98 return ((mmcr1 >> ((24 - (((pmc) - 1) * 8))) & 0xff)); 99 } 100 101 static inline int get_mmcr1_unit(u64 mmcr1, int pmc) 102 { 103 return ((mmcr1 >> ((60 - (4 * ((pmc) - 1))))) & 0xf); 104 } 105 106 static inline int get_mmcr1_comb(u64 mmcr1, int pmc) 107 { 108 return ((mmcr1 >> (38 - ((pmc - 1) * 2))) & 0x3); 109 } 110 111 static inline int get_mmcr1_cache(u64 mmcr1, int pmc) 112 { 113 return ((mmcr1 >> 46) & 0x3); 114 } 115 116 static inline int get_mmcr1_rsq(u64 mmcr1, int pmc) 117 { 118 return mmcr1 & MMCR1_RSQ; 119 } 120 121 static inline int get_mmcr2_fcs(u64 mmcr2, int pmc) 122 { 123 return ((mmcr2 & (1ull << (63 - (((pmc) - 1) * 9)))) >> (63 - (((pmc) - 1) * 9))); 124 } 125 126 static inline int get_mmcr2_fcp(u64 mmcr2, int pmc) 127 { 128 return ((mmcr2 & (1ull << (62 - (((pmc) - 1) * 9)))) >> (62 - (((pmc) - 1) * 9))); 129 } 130 131 static inline int get_mmcr2_fcpc(u64 mmcr2, int pmc) 132 { 133 return ((mmcr2 & (1ull << (61 - (((pmc) - 1) * 9)))) >> (61 - (((pmc) - 1) * 9))); 134 } 135 136 static inline int get_mmcr2_fcm1(u64 mmcr2, int pmc) 137 { 138 return ((mmcr2 & (1ull << (60 - (((pmc) - 1) * 9)))) >> (60 - (((pmc) - 1) * 9))); 139 } 140 141 static inline int get_mmcr2_fcm0(u64 mmcr2, int pmc) 142 { 143 return ((mmcr2 & (1ull << (59 - (((pmc) - 1) * 9)))) >> (59 - (((pmc) - 1) * 9))); 144 } 145 146 static inline int get_mmcr2_fcwait(u64 mmcr2, int pmc) 147 { 148 return ((mmcr2 & (1ull << (58 - (((pmc) - 1) * 9)))) >> (58 - (((pmc) - 1) * 9))); 149 } 150 151 static inline int get_mmcr2_fch(u64 mmcr2, int pmc) 152 { 153 return ((mmcr2 & (1ull << (57 - (((pmc) - 1) * 9)))) >> (57 - (((pmc) - 1) * 9))); 154 } 155 156 static inline int get_mmcr2_fcti(u64 mmcr2, int pmc) 157 { 158 return ((mmcr2 & (1ull << (56 - (((pmc) - 1) * 9)))) >> (56 - (((pmc) - 1) * 9))); 159 } 160 161 static inline int get_mmcr2_fcta(u64 mmcr2, int pmc) 162 { 163 return ((mmcr2 & (1ull << (55 - (((pmc) - 1) * 9)))) >> (55 - (((pmc) - 1) * 9))); 164 } 165 166 static inline int get_mmcr2_l2l3(u64 mmcr2, int pmc) 167 { 168 if (pvr == POWER10) 169 return ((mmcr2 & 0xf8) >> 3); 170 return 0; 171 } 172 173 static inline int get_mmcr3_src(u64 mmcr3, int pmc) 174 { 175 if (pvr != POWER10) 176 return 0; 177 return ((mmcr3 >> ((49 - (15 * ((pmc) - 1))))) & 0x7fff); 178 } 179 180 static inline int get_mmcra_thd_cmp(u64 mmcra, int pmc) 181 { 182 if (pvr == POWER10) 183 return ((mmcra >> 45) & 0x7ff); 184 return ((mmcra >> 45) & 0x3ff); 185 } 186 187 static inline int get_mmcra_sm(u64 mmcra, int pmc) 188 { 189 return ((mmcra >> 42) & 0x3); 190 } 191 192 static inline u64 get_mmcra_bhrb_disable(u64 mmcra, int pmc) 193 { 194 if (pvr == POWER10) 195 return mmcra & BHRB_DISABLE; 196 return 0; 197 } 198 199 static inline int get_mmcra_ifm(u64 mmcra, int pmc) 200 { 201 return ((mmcra >> 30) & 0x3); 202 } 203 204 static inline int get_mmcra_thd_sel(u64 mmcra, int pmc) 205 { 206 return ((mmcra >> 16) & 0x7); 207 } 208 209 static inline int get_mmcra_thd_start(u64 mmcra, int pmc) 210 { 211 return ((mmcra >> 12) & 0xf); 212 } 213 214 static inline int get_mmcra_thd_stop(u64 mmcra, int pmc) 215 { 216 return ((mmcra >> 8) & 0xf); 217 } 218 219 static inline int get_mmcra_rand_samp_elig(u64 mmcra, int pmc) 220 { 221 return ((mmcra >> 4) & 0x7); 222 } 223 224 static inline int get_mmcra_sample_mode(u64 mmcra, int pmc) 225 { 226 return ((mmcra >> 1) & 0x3); 227 } 228 229 static inline int get_mmcra_marked(u64 mmcra, int pmc) 230 { 231 return mmcra & 0x1; 232 } 233