1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2021 ARM Limited 4 * 5 * Verify that the ZA register context in signal frames is set up as 6 * expected. 7 */ 8 9 #include <signal.h> 10 #include <ucontext.h> 11 #include <sys/prctl.h> 12 13 #include "test_signals_utils.h" 14 #include "testcases.h" 15 16 static union { 17 ucontext_t uc; 18 char buf[1024 * 128]; 19 } context; 20 static unsigned int vls[SVE_VQ_MAX]; 21 unsigned int nvls = 0; 22 23 static bool sme_get_vls(struct tdescr *td) 24 { 25 int vq, vl; 26 27 /* 28 * Enumerate up to SME_VQ_MAX vector lengths 29 */ 30 for (vq = SVE_VQ_MAX; vq > 0; --vq) { 31 vl = prctl(PR_SME_SET_VL, vq * 16); 32 if (vl == -1) 33 return false; 34 35 vl &= PR_SME_VL_LEN_MASK; 36 37 /* Did we find the lowest supported VL? */ 38 if (vq < sve_vq_from_vl(vl)) 39 break; 40 41 /* Skip missing VLs */ 42 vq = sve_vq_from_vl(vl); 43 44 vls[nvls++] = vl; 45 } 46 47 /* We need at least one VL */ 48 if (nvls < 1) { 49 fprintf(stderr, "Only %d VL supported\n", nvls); 50 return false; 51 } 52 53 return true; 54 } 55 56 static void setup_za_regs(void) 57 { 58 /* smstart za; real data is TODO */ 59 asm volatile(".inst 0xd503457f" : : : ); 60 } 61 62 static char zeros[ZA_SIG_REGS_SIZE(SVE_VQ_MAX)]; 63 64 static int do_one_sme_vl(struct tdescr *td, siginfo_t *si, ucontext_t *uc, 65 unsigned int vl) 66 { 67 size_t offset; 68 struct _aarch64_ctx *head = GET_BUF_RESV_HEAD(context); 69 struct za_context *za; 70 71 fprintf(stderr, "Testing VL %d\n", vl); 72 73 if (prctl(PR_SME_SET_VL, vl) != vl) { 74 fprintf(stderr, "Failed to set VL\n"); 75 return 1; 76 } 77 78 /* 79 * Get a signal context which should have a SVE frame and registers 80 * in it. 81 */ 82 setup_za_regs(); 83 if (!get_current_context(td, &context.uc, sizeof(context))) 84 return 1; 85 86 head = get_header(head, ZA_MAGIC, GET_BUF_RESV_SIZE(context), &offset); 87 if (!head) { 88 fprintf(stderr, "No ZA context\n"); 89 return 1; 90 } 91 92 za = (struct za_context *)head; 93 if (za->vl != vl) { 94 fprintf(stderr, "Got VL %d, expected %d\n", za->vl, vl); 95 return 1; 96 } 97 98 if (head->size != ZA_SIG_CONTEXT_SIZE(sve_vq_from_vl(vl))) { 99 fprintf(stderr, "ZA context size %u, expected %lu\n", 100 head->size, ZA_SIG_CONTEXT_SIZE(sve_vq_from_vl(vl))); 101 return 1; 102 } 103 104 fprintf(stderr, "Got expected size %u and VL %d\n", 105 head->size, za->vl); 106 107 /* We didn't load any data into ZA so it should be all zeros */ 108 if (memcmp(zeros, (char *)za + ZA_SIG_REGS_OFFSET, 109 ZA_SIG_REGS_SIZE(sve_vq_from_vl(za->vl))) != 0) { 110 fprintf(stderr, "ZA data invalid\n"); 111 return 1; 112 } 113 114 return 0; 115 } 116 117 static int sme_regs(struct tdescr *td, siginfo_t *si, ucontext_t *uc) 118 { 119 int i; 120 121 for (i = 0; i < nvls; i++) { 122 if (do_one_sme_vl(td, si, uc, vls[i])) 123 return 1; 124 } 125 126 td->pass = 1; 127 128 return 0; 129 } 130 131 struct tdescr tde = { 132 .name = "ZA register", 133 .descr = "Check that we get the right ZA registers reported", 134 .feats_required = FEAT_SME, 135 .timeout = 3, 136 .init = sme_get_vls, 137 .run = sme_regs, 138 }; 139