xref: /linux/tools/power/cpupower/utils/idle_monitor/nhm_idle.c (revision ca55b2fef3a9373fcfc30f82fd26bc7fccbda732)
1 /*
2  *  (C) 2010,2011       Thomas Renninger <trenn@suse.de>, Novell Inc.
3  *
4  *  Licensed under the terms of the GNU GPL License version 2.
5  *
6  *  Based on Len Brown's <lenb@kernel.org> turbostat tool.
7  */
8 
9 #if defined(__i386__) || defined(__x86_64__)
10 
11 #include <stdio.h>
12 #include <stdint.h>
13 #include <stdlib.h>
14 #include <string.h>
15 
16 #include "helpers/helpers.h"
17 #include "idle_monitor/cpupower-monitor.h"
18 
19 #define MSR_PKG_C3_RESIDENCY	0x3F8
20 #define MSR_PKG_C6_RESIDENCY	0x3F9
21 #define MSR_CORE_C3_RESIDENCY	0x3FC
22 #define MSR_CORE_C6_RESIDENCY	0x3FD
23 
24 #define MSR_TSC	0x10
25 
26 #define NHM_CSTATE_COUNT 4
27 
28 enum intel_nhm_id { C3 = 0, C6, PC3, PC6, TSC = 0xFFFF };
29 
30 static int nhm_get_count_percent(unsigned int self_id, double *percent,
31 				 unsigned int cpu);
32 
33 static cstate_t nhm_cstates[NHM_CSTATE_COUNT] = {
34 	{
35 		.name			= "C3",
36 		.desc			= N_("Processor Core C3"),
37 		.id			= C3,
38 		.range			= RANGE_CORE,
39 		.get_count_percent	= nhm_get_count_percent,
40 	},
41 	{
42 		.name			= "C6",
43 		.desc			= N_("Processor Core C6"),
44 		.id			= C6,
45 		.range			= RANGE_CORE,
46 		.get_count_percent	= nhm_get_count_percent,
47 	},
48 
49 	{
50 		.name			= "PC3",
51 		.desc			= N_("Processor Package C3"),
52 		.id			= PC3,
53 		.range			= RANGE_PACKAGE,
54 		.get_count_percent	= nhm_get_count_percent,
55 	},
56 	{
57 		.name			= "PC6",
58 		.desc			= N_("Processor Package C6"),
59 		.id			= PC6,
60 		.range			= RANGE_PACKAGE,
61 		.get_count_percent	= nhm_get_count_percent,
62 	},
63 };
64 
65 static unsigned long long tsc_at_measure_start;
66 static unsigned long long tsc_at_measure_end;
67 static unsigned long long *previous_count[NHM_CSTATE_COUNT];
68 static unsigned long long *current_count[NHM_CSTATE_COUNT];
69 /* valid flag for all CPUs. If a MSR read failed it will be zero */
70 static int *is_valid;
71 
72 static int nhm_get_count(enum intel_nhm_id id, unsigned long long *val,
73 			unsigned int cpu)
74 {
75 	int msr;
76 
77 	switch (id) {
78 	case C3:
79 		msr = MSR_CORE_C3_RESIDENCY;
80 		break;
81 	case C6:
82 		msr = MSR_CORE_C6_RESIDENCY;
83 		break;
84 	case PC3:
85 		msr = MSR_PKG_C3_RESIDENCY;
86 		break;
87 	case PC6:
88 		msr = MSR_PKG_C6_RESIDENCY;
89 		break;
90 	case TSC:
91 		msr = MSR_TSC;
92 		break;
93 	default:
94 		return -1;
95 	};
96 	if (read_msr(cpu, msr, val))
97 		return -1;
98 
99 	return 0;
100 }
101 
102 static int nhm_get_count_percent(unsigned int id, double *percent,
103 				 unsigned int cpu)
104 {
105 	*percent = 0.0;
106 
107 	if (!is_valid[cpu])
108 		return -1;
109 
110 	*percent = (100.0 *
111 		(current_count[id][cpu] - previous_count[id][cpu])) /
112 		(tsc_at_measure_end - tsc_at_measure_start);
113 
114 	dprint("%s: previous: %llu - current: %llu - (%u)\n",
115 		nhm_cstates[id].name, previous_count[id][cpu],
116 		current_count[id][cpu], cpu);
117 
118 	dprint("%s: tsc_diff: %llu - count_diff: %llu - percent: %2.f (%u)\n",
119 	       nhm_cstates[id].name,
120 	       (unsigned long long) tsc_at_measure_end - tsc_at_measure_start,
121 	       current_count[id][cpu] - previous_count[id][cpu],
122 	       *percent, cpu);
123 
124 	return 0;
125 }
126 
127 static int nhm_start(void)
128 {
129 	int num, cpu;
130 	unsigned long long dbg, val;
131 
132 	nhm_get_count(TSC, &tsc_at_measure_start, 0);
133 
134 	for (num = 0; num < NHM_CSTATE_COUNT; num++) {
135 		for (cpu = 0; cpu < cpu_count; cpu++) {
136 			is_valid[cpu] = !nhm_get_count(num, &val, cpu);
137 			previous_count[num][cpu] = val;
138 		}
139 	}
140 	nhm_get_count(TSC, &dbg, 0);
141 	dprint("TSC diff: %llu\n", dbg - tsc_at_measure_start);
142 	return 0;
143 }
144 
145 static int nhm_stop(void)
146 {
147 	unsigned long long val;
148 	unsigned long long dbg;
149 	int num, cpu;
150 
151 	nhm_get_count(TSC, &tsc_at_measure_end, 0);
152 
153 	for (num = 0; num < NHM_CSTATE_COUNT; num++) {
154 		for (cpu = 0; cpu < cpu_count; cpu++) {
155 			is_valid[cpu] = !nhm_get_count(num, &val, cpu);
156 			current_count[num][cpu] = val;
157 		}
158 	}
159 	nhm_get_count(TSC, &dbg, 0);
160 	dprint("TSC diff: %llu\n", dbg - tsc_at_measure_end);
161 
162 	return 0;
163 }
164 
165 struct cpuidle_monitor intel_nhm_monitor;
166 
167 struct cpuidle_monitor *intel_nhm_register(void)
168 {
169 	int num;
170 
171 	if (cpupower_cpu_info.vendor != X86_VENDOR_INTEL)
172 		return NULL;
173 
174 	if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_INV_TSC))
175 		return NULL;
176 
177 	if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_APERF))
178 		return NULL;
179 
180 	/* Free this at program termination */
181 	is_valid = calloc(cpu_count, sizeof(int));
182 	for (num = 0; num < NHM_CSTATE_COUNT; num++) {
183 		previous_count[num] = calloc(cpu_count,
184 					sizeof(unsigned long long));
185 		current_count[num]  = calloc(cpu_count,
186 					sizeof(unsigned long long));
187 	}
188 
189 	intel_nhm_monitor.name_len = strlen(intel_nhm_monitor.name);
190 	return &intel_nhm_monitor;
191 }
192 
193 void intel_nhm_unregister(void)
194 {
195 	int num;
196 
197 	for (num = 0; num < NHM_CSTATE_COUNT; num++) {
198 		free(previous_count[num]);
199 		free(current_count[num]);
200 	}
201 	free(is_valid);
202 }
203 
204 struct cpuidle_monitor intel_nhm_monitor = {
205 	.name			= "Nehalem",
206 	.hw_states_num		= NHM_CSTATE_COUNT,
207 	.hw_states		= nhm_cstates,
208 	.start			= nhm_start,
209 	.stop			= nhm_stop,
210 	.do_register		= intel_nhm_register,
211 	.unregister		= intel_nhm_unregister,
212 	.needs_root		= 1,
213 	.overflow_s		= 922000000 /* 922337203 seconds TSC overflow
214 					       at 20GHz */
215 };
216 #endif
217