1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __PERF_SAMPLE_H 3 #define __PERF_SAMPLE_H 4 5 #include <linux/perf_event.h> 6 #include <linux/types.h> 7 8 struct evsel; 9 struct machine; 10 struct thread; 11 12 /* number of register is bound by the number of bits in regs_dump::mask (64) */ 13 #define PERF_SAMPLE_REGS_CACHE_SIZE (8 * sizeof(u64)) 14 15 struct regs_dump { 16 u64 abi; 17 u64 mask; 18 u64 *regs; 19 20 /* Cached values/mask filled by first register access. */ 21 u64 cache_regs[PERF_SAMPLE_REGS_CACHE_SIZE]; 22 u64 cache_mask; 23 }; 24 25 struct stack_dump { 26 u16 offset; 27 u64 size; 28 char *data; 29 }; 30 31 struct sample_read_value { 32 u64 value; 33 u64 id; /* only if PERF_FORMAT_ID */ 34 u64 lost; /* only if PERF_FORMAT_LOST */ 35 }; 36 37 struct sample_read { 38 u64 time_enabled; 39 u64 time_running; 40 union { 41 struct { 42 u64 nr; 43 struct sample_read_value *values; 44 } group; 45 struct sample_read_value one; 46 }; 47 }; 48 49 static inline size_t sample_read_value_size(u64 read_format) 50 { 51 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */ 52 if (read_format & PERF_FORMAT_LOST) 53 return sizeof(struct sample_read_value); 54 else 55 return offsetof(struct sample_read_value, lost); 56 } 57 58 static inline struct sample_read_value *next_sample_read_value(struct sample_read_value *v, u64 read_format) 59 { 60 return (void *)v + sample_read_value_size(read_format); 61 } 62 63 #define sample_read_group__for_each(v, nr, rf) \ 64 for (int __i = 0; __i < (int)nr; v = next_sample_read_value(v, rf), __i++) 65 66 #define MAX_INSN 16 67 68 struct aux_sample { 69 u64 size; 70 void *data; 71 }; 72 73 struct simd_flags { 74 u8 arch:1, /* architecture (isa) */ 75 pred:2; /* predication */ 76 }; 77 78 /* simd architecture flags */ 79 #define SIMD_OP_FLAGS_ARCH_SVE 0x01 /* ARM SVE */ 80 81 /* simd predicate flags */ 82 #define SIMD_OP_FLAGS_PRED_PARTIAL 0x01 /* partial predicate */ 83 #define SIMD_OP_FLAGS_PRED_EMPTY 0x02 /* empty predicate */ 84 85 /** 86 * struct perf_sample 87 * 88 * A sample is generally filled in by evlist__parse_sample/evsel__parse_sample 89 * which fills in the variables from a "union perf_event *event" which is data 90 * from a perf ring buffer or perf.data file. The "event" sample is variable in 91 * length as determined by the perf_event_attr (in the evsel) and details within 92 * the sample event itself. A struct perf_sample avoids needing to care about 93 * the variable length nature of the original event. 94 * 95 * To avoid being excessively large parts of the struct perf_sample are pointers 96 * into the original sample event. In general the lifetime of a struct 97 * perf_sample needs to be less than the "union perf_event *event" it was 98 * derived from. 99 * 100 * The struct regs_dump user_regs and intr_regs are lazily allocated again for 101 * size reasons, due to them holding a cache of looked up registers. The 102 * function pair of perf_sample__init and perf_sample__exit correctly initialize 103 * and clean up these values. 104 */ 105 struct perf_sample { 106 /** @evsel: Backward reference to the evsel used when constructing the sample. */ 107 struct evsel *evsel; 108 /** @ip: The sample event PERF_SAMPLE_IP value. */ 109 u64 ip; 110 /** @pid: The sample event PERF_SAMPLE_TID pid value. */ 111 u32 pid; 112 /** @tid: The sample event PERF_SAMPLE_TID tid value. */ 113 u32 tid; 114 /** @time: The sample event PERF_SAMPLE_TIME value. */ 115 u64 time; 116 /** @addr: The sample event PERF_SAMPLE_ADDR value. */ 117 u64 addr; 118 /** @id: The sample event PERF_SAMPLE_ID or PEF_SAMPLE_IDENTIFIER value. */ 119 u64 id; 120 /** @stream_id: The sample event PERF_SAMPLE_STREAM_ID value. */ 121 u64 stream_id; 122 /** @period: The sample event PERF_SAMPLE_PERIOD value. */ 123 u64 period; 124 /** @weight: Data determined by PERF_SAMPLE_WEIGHT or PERF_SAMPLE_WEIGHT_STRUCT. */ 125 u64 weight; 126 /** @transaction: The sample event PERF_SAMPLE_TRANSACTION value. */ 127 u64 transaction; 128 /** @insn_cnt: Filled in and used by intel-pt. */ 129 u64 insn_cnt; 130 /** @cyc_cnt: Filled in and used by intel-pt. */ 131 u64 cyc_cnt; 132 /** @cpu: The sample event PERF_SAMPLE_CPU value. */ 133 u32 cpu; 134 /** 135 * @raw_size: The size in bytes of raw data from PERF_SAMPLE_RAW. For 136 * alignment reasons this should always be sizeof(u32) 137 * followed by a multiple of sizeof(u64). 138 */ 139 u32 raw_size; 140 /** @data_src: The sample event PERF_SAMPLE_DATA_SRC value. */ 141 u64 data_src; 142 /** @phys_addr: The sample event PERF_SAMPLE_PHYS_ADDR value. */ 143 u64 phys_addr; 144 /** @data_page_size: The sample event PERF_SAMPLE_DATA_PAGE_SIZE value. */ 145 u64 data_page_size; 146 /** @code_page_size: The sample event PERF_SAMPLE_CODE_PAGE_SIZE value. */ 147 u64 code_page_size; 148 /** @cgroup: The sample event PERF_SAMPLE_CGROUP value. */ 149 u64 cgroup; 150 /** @flags: Extra flag data from auxiliary events like intel-pt. */ 151 u32 flags; 152 /** @machine_pid: The guest machine pid derived from the sample id. */ 153 u32 machine_pid; 154 /** @vcpu: The guest machine vcpu derived from the sample id. */ 155 u32 vcpu; 156 /** 157 * @insn_len: Instruction length from auxiliary events like 158 * intel-pt. The instruction itself is held in insn. 159 */ 160 u16 insn_len; 161 /** @misc: The entire struct perf_event_header misc variable. */ 162 u16 misc; 163 /** 164 * @ins_lat: Instruction latency information from weight2 in 165 * PERF_SAMPLE_WEIGHT_STRUCT or auxiliary events like 166 * intel-pt. 167 */ 168 u16 ins_lat; 169 /** 170 * @weight3: From PERF_SAMPLE_WEIGHT_STRUCT. On x86 holds retire_lat, on 171 * powerpc holds p_stage_cyc. 172 */ 173 u16 weight3; 174 /** 175 * @cpumode: The cpumode from struct perf_event_header misc variable 176 * masked with CPUMODE_MASK. Gives user, kernel and hypervisor 177 * information. 178 */ 179 u8 cpumode; 180 /** 181 * @no_hw_idx: For PERF_SAMPLE_BRANCH_STACK, true when 182 * PERF_SAMPLE_BRANCH_HW_INDEX isn't set. 183 */ 184 bool no_hw_idx; 185 /** 186 * @deferred_callchain: When processing PERF_SAMPLE_CALLCHAIN a deferred 187 * user callchain marker was encountered. 188 */ 189 bool deferred_callchain; 190 /** 191 * @merged_callchain: A synthesized merged callchain that is allocated 192 * and needs freeing. 193 */ 194 bool merged_callchain; 195 /** 196 * @deferred_cookie: Identifier of the deferred callchain in the later 197 * PERF_RECORD_CALLCHAIN_DEFERRED event. 198 */ 199 u64 deferred_cookie; 200 /** @insn: A copy of the sampled instruction filled in by perf_sample__fetch_insn. */ 201 char insn[MAX_INSN]; 202 /** @raw_data: Pointer into the original event for PERF_SAMPLE_RAW data. */ 203 void *raw_data; 204 /** 205 * @callchain: Pointer into the original event for PERF_SAMPLE_CALLCHAIN 206 * data. For deferred callchains this may be a copy that 207 * needs freeing, see sample__merge_deferred_callchain. 208 */ 209 struct ip_callchain *callchain; 210 /** @branch_stack: Pointer into the original event for PERF_SAMPLE_BRANCH_STACK data. */ 211 struct branch_stack *branch_stack; 212 /** 213 * @branch_stack_cntr: Pointer into the original event for 214 * PERF_SAMPLE_BRANCH_COUNTERS data. 215 */ 216 u64 *branch_stack_cntr; 217 /** @user_regs: Values and pointers into the sample for PERF_SAMPLE_REGS_USER. */ 218 struct regs_dump *user_regs; 219 /** @intr_regs: Values and pointers into the sample for PERF_SAMPLE_REGS_INTR. */ 220 struct regs_dump *intr_regs; 221 /** @user_stack: Size and pointer into the sample for PERF_SAMPLE_STACK_USER. */ 222 struct stack_dump user_stack; 223 /** 224 * @read: The sample event PERF_SAMPLE_READ counter values. The valid 225 * values depend on the attr.read_format PERF_FORMAT_ values. 226 */ 227 struct sample_read read; 228 /** 229 * @aux_sample: Similar to raw data but with a 64-bit size and 230 * alignment, PERF_SAMPLE_AUX data. 231 */ 232 struct aux_sample aux_sample; 233 /** @simd_flags: SIMD flag information from ARM SPE auxiliary events. */ 234 struct simd_flags simd_flags; 235 }; 236 237 void perf_sample__init(struct perf_sample *sample, bool all); 238 void perf_sample__exit(struct perf_sample *sample); 239 struct regs_dump *perf_sample__user_regs(struct perf_sample *sample); 240 struct regs_dump *perf_sample__intr_regs(struct perf_sample *sample); 241 242 void perf_sample__fetch_insn(struct perf_sample *sample, 243 struct thread *thread, 244 struct machine *machine); 245 246 /* 247 * raw_data is always 4 bytes from an 8-byte boundary, so subtract 4 to get 248 * 8-byte alignment. 249 */ 250 static inline void *perf_sample__synth_ptr(struct perf_sample *sample) 251 { 252 return sample->raw_data - 4; 253 } 254 255 #endif /* __PERF_SAMPLE_H */ 256