1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __PERF_SAMPLE_H 3 #define __PERF_SAMPLE_H 4 5 #include <linux/perf_event.h> 6 #include <linux/types.h> 7 8 struct evsel; 9 struct machine; 10 struct thread; 11 12 /* number of register is bound by the number of bits in regs_dump::mask (64) */ 13 #define PERF_SAMPLE_REGS_CACHE_SIZE (8 * sizeof(u64)) 14 15 struct regs_dump { 16 u64 abi; 17 u64 mask; 18 u64 *regs; 19 20 /* Cached values/mask filled by first register access. */ 21 u64 cache_regs[PERF_SAMPLE_REGS_CACHE_SIZE]; 22 u64 cache_mask; 23 }; 24 25 struct stack_dump { 26 u16 offset; 27 u64 size; 28 char *data; 29 }; 30 31 struct sample_read_value { 32 u64 value; 33 u64 id; /* only if PERF_FORMAT_ID */ 34 u64 lost; /* only if PERF_FORMAT_LOST */ 35 }; 36 37 struct sample_read { 38 u64 time_enabled; 39 u64 time_running; 40 union { 41 struct { 42 u64 nr; 43 struct sample_read_value *values; 44 } group; 45 struct sample_read_value one; 46 }; 47 }; 48 49 static inline size_t sample_read_value_size(u64 read_format) 50 { 51 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */ 52 if (read_format & PERF_FORMAT_LOST) 53 return sizeof(struct sample_read_value); 54 else 55 return offsetof(struct sample_read_value, lost); 56 } 57 58 static inline struct sample_read_value *next_sample_read_value(struct sample_read_value *v, u64 read_format) 59 { 60 return (void *)v + sample_read_value_size(read_format); 61 } 62 63 #define sample_read_group__for_each(v, nr, rf) \ 64 for (int __i = 0; __i < (int)nr; v = next_sample_read_value(v, rf), __i++) 65 66 #define MAX_INSN 16 67 68 struct aux_sample { 69 u64 size; 70 void *data; 71 }; 72 73 struct simd_flags { 74 u8 arch: 2, /* architecture (isa) */ 75 pred: 3, /* predication */ 76 resv: 3; /* reserved */ 77 }; 78 79 /* simd architecture flags */ 80 enum simd_op_flags { 81 SIMD_OP_FLAGS_ARCH_NONE = 0x0, /* No SIMD operation */ 82 SIMD_OP_FLAGS_ARCH_SVE, /* Arm SVE */ 83 SIMD_OP_FLAGS_ARCH_SME, /* Arm SME */ 84 SIMD_OP_FLAGS_ARCH_ASE, /* Arm Advanced SIMD */ 85 }; 86 87 /* simd predicate flags */ 88 enum simd_pred_flags { 89 SIMD_OP_FLAGS_PRED_NONE = 0x0, /* Not available */ 90 SIMD_OP_FLAGS_PRED_PARTIAL, /* partial predicate */ 91 SIMD_OP_FLAGS_PRED_EMPTY, /* empty predicate */ 92 SIMD_OP_FLAGS_PRED_FULL, /* full predicate */ 93 SIMD_OP_FLAGS_PRED_DISABLED, /* disabled predicate */ 94 }; 95 96 /** 97 * struct perf_sample 98 * 99 * A sample is generally filled in by evlist__parse_sample/evsel__parse_sample 100 * which fills in the variables from a "union perf_event *event" which is data 101 * from a perf ring buffer or perf.data file. The "event" sample is variable in 102 * length as determined by the perf_event_attr (in the evsel) and details within 103 * the sample event itself. A struct perf_sample avoids needing to care about 104 * the variable length nature of the original event. 105 * 106 * To avoid being excessively large parts of the struct perf_sample are pointers 107 * into the original sample event. In general the lifetime of a struct 108 * perf_sample needs to be less than the "union perf_event *event" it was 109 * derived from. 110 * 111 * The struct regs_dump user_regs and intr_regs are lazily allocated again for 112 * size reasons, due to them holding a cache of looked up registers. The 113 * function pair of perf_sample__init and perf_sample__exit correctly initialize 114 * and clean up these values. 115 */ 116 struct perf_sample { 117 /** @evsel: Backward reference to the evsel used when constructing the sample. */ 118 struct evsel *evsel; 119 /** @ip: The sample event PERF_SAMPLE_IP value. */ 120 u64 ip; 121 /** @pid: The sample event PERF_SAMPLE_TID pid value. */ 122 u32 pid; 123 /** @tid: The sample event PERF_SAMPLE_TID tid value. */ 124 u32 tid; 125 /** @time: The sample event PERF_SAMPLE_TIME value. */ 126 u64 time; 127 /** @addr: The sample event PERF_SAMPLE_ADDR value. */ 128 u64 addr; 129 /** @id: The sample event PERF_SAMPLE_ID or PERF_SAMPLE_IDENTIFIER value. */ 130 u64 id; 131 /** @stream_id: The sample event PERF_SAMPLE_STREAM_ID value. */ 132 u64 stream_id; 133 /** @period: The sample event PERF_SAMPLE_PERIOD value. */ 134 u64 period; 135 /** @weight: Data determined by PERF_SAMPLE_WEIGHT or PERF_SAMPLE_WEIGHT_STRUCT. */ 136 u64 weight; 137 /** @transaction: The sample event PERF_SAMPLE_TRANSACTION value. */ 138 u64 transaction; 139 /** @insn_cnt: Filled in and used by intel-pt. */ 140 u64 insn_cnt; 141 /** @cyc_cnt: Filled in and used by intel-pt. */ 142 u64 cyc_cnt; 143 /** @cpu: The sample event PERF_SAMPLE_CPU value. */ 144 u32 cpu; 145 /** 146 * @raw_size: The size in bytes of raw data from PERF_SAMPLE_RAW. For 147 * alignment reasons this should always be sizeof(u32) 148 * followed by a multiple of sizeof(u64). 149 */ 150 u32 raw_size; 151 /** @data_src: The sample event PERF_SAMPLE_DATA_SRC value. */ 152 u64 data_src; 153 /** @phys_addr: The sample event PERF_SAMPLE_PHYS_ADDR value. */ 154 u64 phys_addr; 155 /** @data_page_size: The sample event PERF_SAMPLE_DATA_PAGE_SIZE value. */ 156 u64 data_page_size; 157 /** @code_page_size: The sample event PERF_SAMPLE_CODE_PAGE_SIZE value. */ 158 u64 code_page_size; 159 /** @cgroup: The sample event PERF_SAMPLE_CGROUP value. */ 160 u64 cgroup; 161 /** @flags: Extra flag data from auxiliary events like intel-pt. */ 162 u32 flags; 163 /** @machine_pid: The guest machine pid derived from the sample id. */ 164 u32 machine_pid; 165 /** @vcpu: The guest machine vcpu derived from the sample id. */ 166 u32 vcpu; 167 /** 168 * @insn_len: Instruction length from auxiliary events like 169 * intel-pt. The instruction itself is held in insn. 170 */ 171 u16 insn_len; 172 /** @misc: The entire struct perf_event_header misc variable. */ 173 u16 misc; 174 /** 175 * @ins_lat: Instruction latency information from weight2 in 176 * PERF_SAMPLE_WEIGHT_STRUCT or auxiliary events like 177 * intel-pt. 178 */ 179 u16 ins_lat; 180 /** 181 * @weight3: From PERF_SAMPLE_WEIGHT_STRUCT. On x86 holds retire_lat, on 182 * powerpc holds p_stage_cyc. 183 */ 184 u16 weight3; 185 /** 186 * @cpumode: The cpumode from struct perf_event_header misc variable 187 * masked with CPUMODE_MASK. Gives user, kernel and hypervisor 188 * information. 189 */ 190 u8 cpumode; 191 /** 192 * @no_hw_idx: For PERF_SAMPLE_BRANCH_STACK, true when 193 * PERF_SAMPLE_BRANCH_HW_INDEX isn't set. 194 */ 195 bool no_hw_idx; 196 /** 197 * @deferred_callchain: When processing PERF_SAMPLE_CALLCHAIN a deferred 198 * user callchain marker was encountered. 199 */ 200 bool deferred_callchain; 201 /** 202 * @merged_callchain: A synthesized merged callchain that is allocated 203 * and needs freeing. 204 */ 205 bool merged_callchain; 206 /** 207 * @deferred_cookie: Identifier of the deferred callchain in the later 208 * PERF_RECORD_CALLCHAIN_DEFERRED event. 209 */ 210 u64 deferred_cookie; 211 /** @insn: A copy of the sampled instruction filled in by perf_sample__fetch_insn. */ 212 char insn[MAX_INSN]; 213 /** @raw_data: Pointer into the original event for PERF_SAMPLE_RAW data. */ 214 void *raw_data; 215 /** 216 * @callchain: Pointer into the original event for PERF_SAMPLE_CALLCHAIN 217 * data. For deferred callchains this may be a copy that 218 * needs freeing, see sample__merge_deferred_callchain. 219 */ 220 struct ip_callchain *callchain; 221 /** @branch_stack: Pointer into the original event for PERF_SAMPLE_BRANCH_STACK data. */ 222 struct branch_stack *branch_stack; 223 /** 224 * @branch_stack_cntr: Pointer into the original event for 225 * PERF_SAMPLE_BRANCH_COUNTERS data. 226 */ 227 u64 *branch_stack_cntr; 228 /** @user_regs: Values and pointers into the sample for PERF_SAMPLE_REGS_USER. */ 229 struct regs_dump *user_regs; 230 /** @intr_regs: Values and pointers into the sample for PERF_SAMPLE_REGS_INTR. */ 231 struct regs_dump *intr_regs; 232 /** @user_stack: Size and pointer into the sample for PERF_SAMPLE_STACK_USER. */ 233 struct stack_dump user_stack; 234 /** 235 * @read: The sample event PERF_SAMPLE_READ counter values. The valid 236 * values depend on the attr.read_format PERF_FORMAT_ values. 237 */ 238 struct sample_read read; 239 /** 240 * @aux_sample: Similar to raw data but with a 64-bit size and 241 * alignment, PERF_SAMPLE_AUX data. 242 */ 243 struct aux_sample aux_sample; 244 /** @simd_flags: SIMD flag information from ARM SPE auxiliary events. */ 245 struct simd_flags simd_flags; 246 }; 247 248 void perf_sample__init(struct perf_sample *sample, bool all); 249 void perf_sample__exit(struct perf_sample *sample); 250 struct regs_dump *perf_sample__user_regs(struct perf_sample *sample); 251 struct regs_dump *perf_sample__intr_regs(struct perf_sample *sample); 252 253 void perf_sample__fetch_insn(struct perf_sample *sample, 254 struct thread *thread, 255 struct machine *machine); 256 257 /* 258 * raw_data is always 4 bytes from an 8-byte boundary, so subtract 4 to get 259 * 8-byte alignment. 260 */ 261 static inline void *perf_sample__synth_ptr(struct perf_sample *sample) 262 { 263 return sample->raw_data - 4; 264 } 265 266 #endif /* __PERF_SAMPLE_H */ 267