xref: /linux/tools/perf/util/mem-events.c (revision 79997eda0d31bc68203c95ecb978773ee6ce7a1f)
1 // SPDX-License-Identifier: GPL-2.0
2 #include <stddef.h>
3 #include <stdlib.h>
4 #include <string.h>
5 #include <errno.h>
6 #include <sys/types.h>
7 #include <sys/stat.h>
8 #include <unistd.h>
9 #include <api/fs/fs.h>
10 #include <linux/kernel.h>
11 #include "map_symbol.h"
12 #include "mem-events.h"
13 #include "debug.h"
14 #include "symbol.h"
15 #include "pmu.h"
16 #include "pmus.h"
17 
18 unsigned int perf_mem_events__loads_ldlat = 30;
19 
20 #define E(t, n, s) { .tag = t, .name = n, .sysfs_name = s }
21 
22 static struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] = {
23 	E("ldlat-loads",	"cpu/mem-loads,ldlat=%u/P",	"cpu/events/mem-loads"),
24 	E("ldlat-stores",	"cpu/mem-stores/P",		"cpu/events/mem-stores"),
25 	E(NULL,			NULL,				NULL),
26 };
27 #undef E
28 
29 static char mem_loads_name[100];
30 static bool mem_loads_name__init;
31 
32 struct perf_mem_event * __weak perf_mem_events__ptr(int i)
33 {
34 	if (i >= PERF_MEM_EVENTS__MAX)
35 		return NULL;
36 
37 	return &perf_mem_events[i];
38 }
39 
40 const char * __weak perf_mem_events__name(int i, const char *pmu_name  __maybe_unused)
41 {
42 	struct perf_mem_event *e = perf_mem_events__ptr(i);
43 
44 	if (!e)
45 		return NULL;
46 
47 	if (i == PERF_MEM_EVENTS__LOAD) {
48 		if (!mem_loads_name__init) {
49 			mem_loads_name__init = true;
50 			scnprintf(mem_loads_name, sizeof(mem_loads_name),
51 				  e->name, perf_mem_events__loads_ldlat);
52 		}
53 		return mem_loads_name;
54 	}
55 
56 	return e->name;
57 }
58 
59 __weak bool is_mem_loads_aux_event(struct evsel *leader __maybe_unused)
60 {
61 	return false;
62 }
63 
64 int perf_mem_events__parse(const char *str)
65 {
66 	char *tok, *saveptr = NULL;
67 	bool found = false;
68 	char *buf;
69 	int j;
70 
71 	/* We need buffer that we know we can write to. */
72 	buf = malloc(strlen(str) + 1);
73 	if (!buf)
74 		return -ENOMEM;
75 
76 	strcpy(buf, str);
77 
78 	tok = strtok_r((char *)buf, ",", &saveptr);
79 
80 	while (tok) {
81 		for (j = 0; j < PERF_MEM_EVENTS__MAX; j++) {
82 			struct perf_mem_event *e = perf_mem_events__ptr(j);
83 
84 			if (!e->tag)
85 				continue;
86 
87 			if (strstr(e->tag, tok))
88 				e->record = found = true;
89 		}
90 
91 		tok = strtok_r(NULL, ",", &saveptr);
92 	}
93 
94 	free(buf);
95 
96 	if (found)
97 		return 0;
98 
99 	pr_err("failed: event '%s' not found, use '-e list' to get list of available events\n", str);
100 	return -1;
101 }
102 
103 static bool perf_mem_event__supported(const char *mnt, char *sysfs_name)
104 {
105 	char path[PATH_MAX];
106 	struct stat st;
107 
108 	scnprintf(path, PATH_MAX, "%s/devices/%s", mnt, sysfs_name);
109 	return !stat(path, &st);
110 }
111 
112 int perf_mem_events__init(void)
113 {
114 	const char *mnt = sysfs__mount();
115 	bool found = false;
116 	int j;
117 
118 	if (!mnt)
119 		return -ENOENT;
120 
121 	for (j = 0; j < PERF_MEM_EVENTS__MAX; j++) {
122 		struct perf_mem_event *e = perf_mem_events__ptr(j);
123 		char sysfs_name[100];
124 		struct perf_pmu *pmu = NULL;
125 
126 		/*
127 		 * If the event entry isn't valid, skip initialization
128 		 * and "e->supported" will keep false.
129 		 */
130 		if (!e->tag)
131 			continue;
132 
133 		/*
134 		 * Scan all PMUs not just core ones, since perf mem/c2c on
135 		 * platforms like AMD uses IBS OP PMU which is independent
136 		 * of core PMU.
137 		 */
138 		while ((pmu = perf_pmus__scan(pmu)) != NULL) {
139 			scnprintf(sysfs_name, sizeof(sysfs_name), e->sysfs_name, pmu->name);
140 			e->supported |= perf_mem_event__supported(mnt, sysfs_name);
141 		}
142 
143 		if (e->supported)
144 			found = true;
145 	}
146 
147 	return found ? 0 : -ENOENT;
148 }
149 
150 void perf_mem_events__list(void)
151 {
152 	int j;
153 
154 	for (j = 0; j < PERF_MEM_EVENTS__MAX; j++) {
155 		struct perf_mem_event *e = perf_mem_events__ptr(j);
156 
157 		fprintf(stderr, "%-*s%-*s%s",
158 			e->tag ? 13 : 0,
159 			e->tag ? : "",
160 			e->tag && verbose > 0 ? 25 : 0,
161 			e->tag && verbose > 0 ? perf_mem_events__name(j, NULL) : "",
162 			e->supported ? ": available\n" : "");
163 	}
164 }
165 
166 static void perf_mem_events__print_unsupport_hybrid(struct perf_mem_event *e,
167 						    int idx)
168 {
169 	const char *mnt = sysfs__mount();
170 	char sysfs_name[100];
171 	struct perf_pmu *pmu = NULL;
172 
173 	while ((pmu = perf_pmus__scan(pmu)) != NULL) {
174 		scnprintf(sysfs_name, sizeof(sysfs_name), e->sysfs_name,
175 			  pmu->name);
176 		if (!perf_mem_event__supported(mnt, sysfs_name)) {
177 			pr_err("failed: event '%s' not supported\n",
178 			       perf_mem_events__name(idx, pmu->name));
179 		}
180 	}
181 }
182 
183 int perf_mem_events__record_args(const char **rec_argv, int *argv_nr,
184 				 char **rec_tmp, int *tmp_nr)
185 {
186 	int i = *argv_nr, k = 0;
187 	struct perf_mem_event *e;
188 
189 	for (int j = 0; j < PERF_MEM_EVENTS__MAX; j++) {
190 		e = perf_mem_events__ptr(j);
191 		if (!e->record)
192 			continue;
193 
194 		if (perf_pmus__num_mem_pmus() == 1) {
195 			if (!e->supported) {
196 				pr_err("failed: event '%s' not supported\n",
197 				       perf_mem_events__name(j, NULL));
198 				return -1;
199 			}
200 
201 			rec_argv[i++] = "-e";
202 			rec_argv[i++] = perf_mem_events__name(j, NULL);
203 		} else {
204 			struct perf_pmu *pmu = NULL;
205 
206 			if (!e->supported) {
207 				perf_mem_events__print_unsupport_hybrid(e, j);
208 				return -1;
209 			}
210 
211 			while ((pmu = perf_pmus__scan(pmu)) != NULL) {
212 				const char *s = perf_mem_events__name(j, pmu->name);
213 
214 				rec_argv[i++] = "-e";
215 				if (s) {
216 					char *copy = strdup(s);
217 					if (!copy)
218 						return -1;
219 
220 					rec_argv[i++] = copy;
221 					rec_tmp[k++] = copy;
222 				}
223 			}
224 		}
225 	}
226 
227 	*argv_nr = i;
228 	*tmp_nr = k;
229 	return 0;
230 }
231 
232 static const char * const tlb_access[] = {
233 	"N/A",
234 	"HIT",
235 	"MISS",
236 	"L1",
237 	"L2",
238 	"Walker",
239 	"Fault",
240 };
241 
242 int perf_mem__tlb_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
243 {
244 	size_t l = 0, i;
245 	u64 m = PERF_MEM_TLB_NA;
246 	u64 hit, miss;
247 
248 	sz -= 1; /* -1 for null termination */
249 	out[0] = '\0';
250 
251 	if (mem_info)
252 		m = mem_info->data_src.mem_dtlb;
253 
254 	hit = m & PERF_MEM_TLB_HIT;
255 	miss = m & PERF_MEM_TLB_MISS;
256 
257 	/* already taken care of */
258 	m &= ~(PERF_MEM_TLB_HIT|PERF_MEM_TLB_MISS);
259 
260 	for (i = 0; m && i < ARRAY_SIZE(tlb_access); i++, m >>= 1) {
261 		if (!(m & 0x1))
262 			continue;
263 		if (l) {
264 			strcat(out, " or ");
265 			l += 4;
266 		}
267 		l += scnprintf(out + l, sz - l, tlb_access[i]);
268 	}
269 	if (*out == '\0')
270 		l += scnprintf(out, sz - l, "N/A");
271 	if (hit)
272 		l += scnprintf(out + l, sz - l, " hit");
273 	if (miss)
274 		l += scnprintf(out + l, sz - l, " miss");
275 
276 	return l;
277 }
278 
279 static const char * const mem_lvl[] = {
280 	"N/A",
281 	"HIT",
282 	"MISS",
283 	"L1",
284 	"LFB/MAB",
285 	"L2",
286 	"L3",
287 	"Local RAM",
288 	"Remote RAM (1 hop)",
289 	"Remote RAM (2 hops)",
290 	"Remote Cache (1 hop)",
291 	"Remote Cache (2 hops)",
292 	"I/O",
293 	"Uncached",
294 };
295 
296 static const char * const mem_lvlnum[] = {
297 	[PERF_MEM_LVLNUM_UNC] = "Uncached",
298 	[PERF_MEM_LVLNUM_CXL] = "CXL",
299 	[PERF_MEM_LVLNUM_IO] = "I/O",
300 	[PERF_MEM_LVLNUM_ANY_CACHE] = "Any cache",
301 	[PERF_MEM_LVLNUM_LFB] = "LFB/MAB",
302 	[PERF_MEM_LVLNUM_RAM] = "RAM",
303 	[PERF_MEM_LVLNUM_PMEM] = "PMEM",
304 	[PERF_MEM_LVLNUM_NA] = "N/A",
305 };
306 
307 static const char * const mem_hops[] = {
308 	"N/A",
309 	/*
310 	 * While printing, 'Remote' will be added to represent
311 	 * 'Remote core, same node' accesses as remote field need
312 	 * to be set with mem_hops field.
313 	 */
314 	"core, same node",
315 	"node, same socket",
316 	"socket, same board",
317 	"board",
318 };
319 
320 static int perf_mem__op_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
321 {
322 	u64 op = PERF_MEM_LOCK_NA;
323 	int l;
324 
325 	if (mem_info)
326 		op = mem_info->data_src.mem_op;
327 
328 	if (op & PERF_MEM_OP_NA)
329 		l = scnprintf(out, sz, "N/A");
330 	else if (op & PERF_MEM_OP_LOAD)
331 		l = scnprintf(out, sz, "LOAD");
332 	else if (op & PERF_MEM_OP_STORE)
333 		l = scnprintf(out, sz, "STORE");
334 	else if (op & PERF_MEM_OP_PFETCH)
335 		l = scnprintf(out, sz, "PFETCH");
336 	else if (op & PERF_MEM_OP_EXEC)
337 		l = scnprintf(out, sz, "EXEC");
338 	else
339 		l = scnprintf(out, sz, "No");
340 
341 	return l;
342 }
343 
344 int perf_mem__lvl_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
345 {
346 	union perf_mem_data_src data_src;
347 	int printed = 0;
348 	size_t l = 0;
349 	size_t i;
350 	int lvl;
351 	char hit_miss[5] = {0};
352 
353 	sz -= 1; /* -1 for null termination */
354 	out[0] = '\0';
355 
356 	if (!mem_info)
357 		goto na;
358 
359 	data_src = mem_info->data_src;
360 
361 	if (data_src.mem_lvl & PERF_MEM_LVL_HIT)
362 		memcpy(hit_miss, "hit", 3);
363 	else if (data_src.mem_lvl & PERF_MEM_LVL_MISS)
364 		memcpy(hit_miss, "miss", 4);
365 
366 	lvl = data_src.mem_lvl_num;
367 	if (lvl && lvl != PERF_MEM_LVLNUM_NA) {
368 		if (data_src.mem_remote) {
369 			strcat(out, "Remote ");
370 			l += 7;
371 		}
372 
373 		if (data_src.mem_hops)
374 			l += scnprintf(out + l, sz - l, "%s ", mem_hops[data_src.mem_hops]);
375 
376 		if (mem_lvlnum[lvl])
377 			l += scnprintf(out + l, sz - l, mem_lvlnum[lvl]);
378 		else
379 			l += scnprintf(out + l, sz - l, "L%d", lvl);
380 
381 		l += scnprintf(out + l, sz - l, " %s", hit_miss);
382 		return l;
383 	}
384 
385 	lvl = data_src.mem_lvl;
386 	if (!lvl)
387 		goto na;
388 
389 	lvl &= ~(PERF_MEM_LVL_NA | PERF_MEM_LVL_HIT | PERF_MEM_LVL_MISS);
390 	if (!lvl)
391 		goto na;
392 
393 	for (i = 0; lvl && i < ARRAY_SIZE(mem_lvl); i++, lvl >>= 1) {
394 		if (!(lvl & 0x1))
395 			continue;
396 		if (printed++) {
397 			strcat(out, " or ");
398 			l += 4;
399 		}
400 		l += scnprintf(out + l, sz - l, mem_lvl[i]);
401 	}
402 
403 	if (printed) {
404 		l += scnprintf(out + l, sz - l, " %s", hit_miss);
405 		return l;
406 	}
407 
408 na:
409 	strcat(out, "N/A");
410 	return 3;
411 }
412 
413 static const char * const snoop_access[] = {
414 	"N/A",
415 	"None",
416 	"Hit",
417 	"Miss",
418 	"HitM",
419 };
420 
421 static const char * const snoopx_access[] = {
422 	"Fwd",
423 	"Peer",
424 };
425 
426 int perf_mem__snp_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
427 {
428 	size_t i, l = 0;
429 	u64 m = PERF_MEM_SNOOP_NA;
430 
431 	sz -= 1; /* -1 for null termination */
432 	out[0] = '\0';
433 
434 	if (mem_info)
435 		m = mem_info->data_src.mem_snoop;
436 
437 	for (i = 0; m && i < ARRAY_SIZE(snoop_access); i++, m >>= 1) {
438 		if (!(m & 0x1))
439 			continue;
440 		if (l) {
441 			strcat(out, " or ");
442 			l += 4;
443 		}
444 		l += scnprintf(out + l, sz - l, snoop_access[i]);
445 	}
446 
447 	m = 0;
448 	if (mem_info)
449 		m = mem_info->data_src.mem_snoopx;
450 
451 	for (i = 0; m && i < ARRAY_SIZE(snoopx_access); i++, m >>= 1) {
452 		if (!(m & 0x1))
453 			continue;
454 
455 		if (l) {
456 			strcat(out, " or ");
457 			l += 4;
458 		}
459 		l += scnprintf(out + l, sz - l, snoopx_access[i]);
460 	}
461 
462 	if (*out == '\0')
463 		l += scnprintf(out, sz - l, "N/A");
464 
465 	return l;
466 }
467 
468 int perf_mem__lck_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
469 {
470 	u64 mask = PERF_MEM_LOCK_NA;
471 	int l;
472 
473 	if (mem_info)
474 		mask = mem_info->data_src.mem_lock;
475 
476 	if (mask & PERF_MEM_LOCK_NA)
477 		l = scnprintf(out, sz, "N/A");
478 	else if (mask & PERF_MEM_LOCK_LOCKED)
479 		l = scnprintf(out, sz, "Yes");
480 	else
481 		l = scnprintf(out, sz, "No");
482 
483 	return l;
484 }
485 
486 int perf_mem__blk_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
487 {
488 	size_t l = 0;
489 	u64 mask = PERF_MEM_BLK_NA;
490 
491 	sz -= 1; /* -1 for null termination */
492 	out[0] = '\0';
493 
494 	if (mem_info)
495 		mask = mem_info->data_src.mem_blk;
496 
497 	if (!mask || (mask & PERF_MEM_BLK_NA)) {
498 		l += scnprintf(out + l, sz - l, " N/A");
499 		return l;
500 	}
501 	if (mask & PERF_MEM_BLK_DATA)
502 		l += scnprintf(out + l, sz - l, " Data");
503 	if (mask & PERF_MEM_BLK_ADDR)
504 		l += scnprintf(out + l, sz - l, " Addr");
505 
506 	return l;
507 }
508 
509 int perf_script__meminfo_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
510 {
511 	int i = 0;
512 
513 	i += scnprintf(out, sz, "|OP ");
514 	i += perf_mem__op_scnprintf(out + i, sz - i, mem_info);
515 	i += scnprintf(out + i, sz - i, "|LVL ");
516 	i += perf_mem__lvl_scnprintf(out + i, sz, mem_info);
517 	i += scnprintf(out + i, sz - i, "|SNP ");
518 	i += perf_mem__snp_scnprintf(out + i, sz - i, mem_info);
519 	i += scnprintf(out + i, sz - i, "|TLB ");
520 	i += perf_mem__tlb_scnprintf(out + i, sz - i, mem_info);
521 	i += scnprintf(out + i, sz - i, "|LCK ");
522 	i += perf_mem__lck_scnprintf(out + i, sz - i, mem_info);
523 	i += scnprintf(out + i, sz - i, "|BLK ");
524 	i += perf_mem__blk_scnprintf(out + i, sz - i, mem_info);
525 
526 	return i;
527 }
528 
529 int c2c_decode_stats(struct c2c_stats *stats, struct mem_info *mi)
530 {
531 	union perf_mem_data_src *data_src = &mi->data_src;
532 	u64 daddr  = mi->daddr.addr;
533 	u64 op     = data_src->mem_op;
534 	u64 lvl    = data_src->mem_lvl;
535 	u64 snoop  = data_src->mem_snoop;
536 	u64 snoopx = data_src->mem_snoopx;
537 	u64 lock   = data_src->mem_lock;
538 	u64 blk    = data_src->mem_blk;
539 	/*
540 	 * Skylake might report unknown remote level via this
541 	 * bit, consider it when evaluating remote HITMs.
542 	 *
543 	 * Incase of power, remote field can also be used to denote cache
544 	 * accesses from the another core of same node. Hence, setting
545 	 * mrem only when HOPS is zero along with set remote field.
546 	 */
547 	bool mrem  = (data_src->mem_remote && !data_src->mem_hops);
548 	int err = 0;
549 
550 #define HITM_INC(__f)		\
551 do {				\
552 	stats->__f++;		\
553 	stats->tot_hitm++;	\
554 } while (0)
555 
556 #define PEER_INC(__f)		\
557 do {				\
558 	stats->__f++;		\
559 	stats->tot_peer++;	\
560 } while (0)
561 
562 #define P(a, b) PERF_MEM_##a##_##b
563 
564 	stats->nr_entries++;
565 
566 	if (lock & P(LOCK, LOCKED)) stats->locks++;
567 
568 	if (blk & P(BLK, DATA)) stats->blk_data++;
569 	if (blk & P(BLK, ADDR)) stats->blk_addr++;
570 
571 	if (op & P(OP, LOAD)) {
572 		/* load */
573 		stats->load++;
574 
575 		if (!daddr) {
576 			stats->ld_noadrs++;
577 			return -1;
578 		}
579 
580 		if (lvl & P(LVL, HIT)) {
581 			if (lvl & P(LVL, UNC)) stats->ld_uncache++;
582 			if (lvl & P(LVL, IO))  stats->ld_io++;
583 			if (lvl & P(LVL, LFB)) stats->ld_fbhit++;
584 			if (lvl & P(LVL, L1 )) stats->ld_l1hit++;
585 			if (lvl & P(LVL, L2)) {
586 				stats->ld_l2hit++;
587 
588 				if (snoopx & P(SNOOPX, PEER))
589 					PEER_INC(lcl_peer);
590 			}
591 			if (lvl & P(LVL, L3 )) {
592 				if (snoop & P(SNOOP, HITM))
593 					HITM_INC(lcl_hitm);
594 				else
595 					stats->ld_llchit++;
596 
597 				if (snoopx & P(SNOOPX, PEER))
598 					PEER_INC(lcl_peer);
599 			}
600 
601 			if (lvl & P(LVL, LOC_RAM)) {
602 				stats->lcl_dram++;
603 				if (snoop & P(SNOOP, HIT))
604 					stats->ld_shared++;
605 				else
606 					stats->ld_excl++;
607 			}
608 
609 			if ((lvl & P(LVL, REM_RAM1)) ||
610 			    (lvl & P(LVL, REM_RAM2)) ||
611 			     mrem) {
612 				stats->rmt_dram++;
613 				if (snoop & P(SNOOP, HIT))
614 					stats->ld_shared++;
615 				else
616 					stats->ld_excl++;
617 			}
618 		}
619 
620 		if ((lvl & P(LVL, REM_CCE1)) ||
621 		    (lvl & P(LVL, REM_CCE2)) ||
622 		     mrem) {
623 			if (snoop & P(SNOOP, HIT)) {
624 				stats->rmt_hit++;
625 			} else if (snoop & P(SNOOP, HITM)) {
626 				HITM_INC(rmt_hitm);
627 			} else if (snoopx & P(SNOOPX, PEER)) {
628 				stats->rmt_hit++;
629 				PEER_INC(rmt_peer);
630 			}
631 		}
632 
633 		if ((lvl & P(LVL, MISS)))
634 			stats->ld_miss++;
635 
636 	} else if (op & P(OP, STORE)) {
637 		/* store */
638 		stats->store++;
639 
640 		if (!daddr) {
641 			stats->st_noadrs++;
642 			return -1;
643 		}
644 
645 		if (lvl & P(LVL, HIT)) {
646 			if (lvl & P(LVL, UNC)) stats->st_uncache++;
647 			if (lvl & P(LVL, L1 )) stats->st_l1hit++;
648 		}
649 		if (lvl & P(LVL, MISS))
650 			if (lvl & P(LVL, L1)) stats->st_l1miss++;
651 		if (lvl & P(LVL, NA))
652 			stats->st_na++;
653 	} else {
654 		/* unparsable data_src? */
655 		stats->noparse++;
656 		return -1;
657 	}
658 
659 	if (!mi->daddr.ms.map || !mi->iaddr.ms.map) {
660 		stats->nomap++;
661 		return -1;
662 	}
663 
664 #undef P
665 #undef HITM_INC
666 	return err;
667 }
668 
669 void c2c_add_stats(struct c2c_stats *stats, struct c2c_stats *add)
670 {
671 	stats->nr_entries	+= add->nr_entries;
672 
673 	stats->locks		+= add->locks;
674 	stats->store		+= add->store;
675 	stats->st_uncache	+= add->st_uncache;
676 	stats->st_noadrs	+= add->st_noadrs;
677 	stats->st_l1hit		+= add->st_l1hit;
678 	stats->st_l1miss	+= add->st_l1miss;
679 	stats->st_na		+= add->st_na;
680 	stats->load		+= add->load;
681 	stats->ld_excl		+= add->ld_excl;
682 	stats->ld_shared	+= add->ld_shared;
683 	stats->ld_uncache	+= add->ld_uncache;
684 	stats->ld_io		+= add->ld_io;
685 	stats->ld_miss		+= add->ld_miss;
686 	stats->ld_noadrs	+= add->ld_noadrs;
687 	stats->ld_fbhit		+= add->ld_fbhit;
688 	stats->ld_l1hit		+= add->ld_l1hit;
689 	stats->ld_l2hit		+= add->ld_l2hit;
690 	stats->ld_llchit	+= add->ld_llchit;
691 	stats->lcl_hitm		+= add->lcl_hitm;
692 	stats->rmt_hitm		+= add->rmt_hitm;
693 	stats->tot_hitm		+= add->tot_hitm;
694 	stats->lcl_peer		+= add->lcl_peer;
695 	stats->rmt_peer		+= add->rmt_peer;
696 	stats->tot_peer		+= add->tot_peer;
697 	stats->rmt_hit		+= add->rmt_hit;
698 	stats->lcl_dram		+= add->lcl_dram;
699 	stats->rmt_dram		+= add->rmt_dram;
700 	stats->blk_data		+= add->blk_data;
701 	stats->blk_addr		+= add->blk_addr;
702 	stats->nomap		+= add->nomap;
703 	stats->noparse		+= add->noparse;
704 }
705