1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * arm_spe_decoder.h: Arm Statistical Profiling Extensions support 4 * Copyright (c) 2019-2020, Arm Ltd. 5 */ 6 7 #ifndef INCLUDE__ARM_SPE_DECODER_H__ 8 #define INCLUDE__ARM_SPE_DECODER_H__ 9 10 #include <stdbool.h> 11 #include <stddef.h> 12 #include <stdint.h> 13 14 #include "arm-spe-pkt-decoder.h" 15 16 #define ARM_SPE_L1D_ACCESS BIT(EV_L1D_ACCESS) 17 #define ARM_SPE_L1D_MISS BIT(EV_L1D_REFILL) 18 #define ARM_SPE_LLC_ACCESS BIT(EV_LLC_ACCESS) 19 #define ARM_SPE_LLC_MISS BIT(EV_LLC_MISS) 20 #define ARM_SPE_TLB_ACCESS BIT(EV_TLB_ACCESS) 21 #define ARM_SPE_TLB_MISS BIT(EV_TLB_WALK) 22 #define ARM_SPE_BRANCH_MISS BIT(EV_MISPRED) 23 #define ARM_SPE_BRANCH_NOT_TAKEN BIT(EV_NOT_TAKEN) 24 #define ARM_SPE_REMOTE_ACCESS BIT(EV_REMOTE_ACCESS) 25 #define ARM_SPE_SVE_PARTIAL_PRED BIT(EV_PARTIAL_PREDICATE) 26 #define ARM_SPE_SVE_EMPTY_PRED BIT(EV_EMPTY_PREDICATE) 27 #define ARM_SPE_IN_TXN BIT(EV_TRANSACTIONAL) 28 #define ARM_SPE_L2D_ACCESS BIT(EV_L2D_ACCESS) 29 #define ARM_SPE_L2D_MISS BIT(EV_L2D_MISS) 30 #define ARM_SPE_RECENTLY_FETCHED BIT(EV_RECENTLY_FETCHED) 31 #define ARM_SPE_DATA_SNOOPED BIT(EV_DATA_SNOOPED) 32 #define ARM_SPE_HITM BIT(EV_CACHE_DATA_MODIFIED) 33 34 enum arm_spe_op_type { 35 /* First level operation type */ 36 ARM_SPE_OP_OTHER = 1 << 0, 37 ARM_SPE_OP_LDST = 1 << 1, 38 ARM_SPE_OP_BRANCH_ERET = 1 << 2, 39 }; 40 41 enum arm_spe_2nd_op_ldst { 42 ARM_SPE_OP_GP_REG = 1 << 8, 43 ARM_SPE_OP_UNSPEC_REG = 1 << 9, 44 ARM_SPE_OP_NV_SYSREG = 1 << 10, 45 ARM_SPE_OP_SIMD_FP = 1 << 11, 46 ARM_SPE_OP_SVE = 1 << 12, 47 ARM_SPE_OP_MTE_TAG = 1 << 13, 48 49 /* Assisted information for memory / SIMD */ 50 ARM_SPE_OP_LD = 1 << 20, 51 ARM_SPE_OP_ST = 1 << 21, 52 ARM_SPE_OP_ATOMIC = 1 << 22, 53 ARM_SPE_OP_EXCL = 1 << 23, 54 ARM_SPE_OP_AR = 1 << 24, 55 ARM_SPE_OP_DP = 1 << 25, /* Data processing */ 56 }; 57 58 enum arm_spe_2nd_op_branch { 59 ARM_SPE_OP_BR_COND = 1 << 8, 60 ARM_SPE_OP_BR_INDIRECT = 1 << 9, 61 ARM_SPE_OP_BR_GCS = 1 << 10, 62 ARM_SPE_OP_BR_CR_BL = 1 << 11, 63 ARM_SPE_OP_BR_CR_RET = 1 << 12, 64 ARM_SPE_OP_BR_CR_NON_BL_RET = 1 << 13, 65 }; 66 67 enum arm_spe_common_data_source { 68 ARM_SPE_COMMON_DS_L1D = 0x0, 69 ARM_SPE_COMMON_DS_L2 = 0x8, 70 ARM_SPE_COMMON_DS_PEER_CORE = 0x9, 71 ARM_SPE_COMMON_DS_LOCAL_CLUSTER = 0xa, 72 ARM_SPE_COMMON_DS_SYS_CACHE = 0xb, 73 ARM_SPE_COMMON_DS_PEER_CLUSTER = 0xc, 74 ARM_SPE_COMMON_DS_REMOTE = 0xd, 75 ARM_SPE_COMMON_DS_DRAM = 0xe, 76 }; 77 78 enum arm_spe_ampereone_data_source { 79 ARM_SPE_AMPEREONE_LOCAL_CHIP_CACHE_OR_DEVICE = 0x0, 80 ARM_SPE_AMPEREONE_SLC = 0x3, 81 ARM_SPE_AMPEREONE_REMOTE_CHIP_CACHE = 0x5, 82 ARM_SPE_AMPEREONE_DDR = 0x7, 83 ARM_SPE_AMPEREONE_L1D = 0x8, 84 ARM_SPE_AMPEREONE_L2D = 0x9, 85 }; 86 87 enum arm_spe_hisi_hip_data_source { 88 ARM_SPE_HISI_HIP_PEER_CPU = 0, 89 ARM_SPE_HISI_HIP_PEER_CPU_HITM = 1, 90 ARM_SPE_HISI_HIP_L3 = 2, 91 ARM_SPE_HISI_HIP_L3_HITM = 3, 92 ARM_SPE_HISI_HIP_PEER_CLUSTER = 4, 93 ARM_SPE_HISI_HIP_PEER_CLUSTER_HITM = 5, 94 ARM_SPE_HISI_HIP_REMOTE_SOCKET = 6, 95 ARM_SPE_HISI_HIP_REMOTE_SOCKET_HITM = 7, 96 ARM_SPE_HISI_HIP_LOCAL_MEM = 8, 97 ARM_SPE_HISI_HIP_REMOTE_MEM = 9, 98 ARM_SPE_HISI_HIP_NC_DEV = 13, 99 ARM_SPE_HISI_HIP_L2 = 16, 100 ARM_SPE_HISI_HIP_L2_HITM = 17, 101 ARM_SPE_HISI_HIP_L1 = 18, 102 }; 103 104 struct arm_spe_record { 105 u64 type; 106 int err; 107 u32 op; 108 u32 latency; 109 u64 from_ip; 110 u64 to_ip; 111 u64 prev_br_tgt; 112 u64 timestamp; 113 u64 virt_addr; 114 u64 phys_addr; 115 u64 context_id; 116 u16 source; 117 }; 118 119 struct arm_spe_insn; 120 121 struct arm_spe_buffer { 122 const unsigned char *buf; 123 size_t len; 124 u64 offset; 125 u64 trace_nr; 126 }; 127 128 struct arm_spe_params { 129 int (*get_trace)(struct arm_spe_buffer *buffer, void *data); 130 void *data; 131 }; 132 133 struct arm_spe_decoder { 134 int (*get_trace)(struct arm_spe_buffer *buffer, void *data); 135 void *data; 136 struct arm_spe_record record; 137 138 const unsigned char *buf; 139 size_t len; 140 141 struct arm_spe_pkt packet; 142 }; 143 144 struct arm_spe_decoder *arm_spe_decoder_new(struct arm_spe_params *params); 145 void arm_spe_decoder_free(struct arm_spe_decoder *decoder); 146 147 int arm_spe_decode(struct arm_spe_decoder *decoder); 148 149 #endif 150