1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * arm_spe_decoder.h: Arm Statistical Profiling Extensions support 4 * Copyright (c) 2019-2020, Arm Ltd. 5 */ 6 7 #ifndef INCLUDE__ARM_SPE_DECODER_H__ 8 #define INCLUDE__ARM_SPE_DECODER_H__ 9 10 #include <stdbool.h> 11 #include <stddef.h> 12 #include <stdint.h> 13 14 #include "arm-spe-pkt-decoder.h" 15 16 #define ARM_SPE_L1D_ACCESS BIT(EV_L1D_ACCESS) 17 #define ARM_SPE_L1D_MISS BIT(EV_L1D_REFILL) 18 #define ARM_SPE_LLC_ACCESS BIT(EV_LLC_ACCESS) 19 #define ARM_SPE_LLC_MISS BIT(EV_LLC_MISS) 20 #define ARM_SPE_TLB_ACCESS BIT(EV_TLB_ACCESS) 21 #define ARM_SPE_TLB_MISS BIT(EV_TLB_WALK) 22 #define ARM_SPE_BRANCH_MISS BIT(EV_MISPRED) 23 #define ARM_SPE_BRANCH_NOT_TAKEN BIT(EV_NOT_TAKEN) 24 #define ARM_SPE_REMOTE_ACCESS BIT(EV_REMOTE_ACCESS) 25 #define ARM_SPE_SVE_PARTIAL_PRED BIT(EV_PARTIAL_PREDICATE) 26 #define ARM_SPE_SVE_EMPTY_PRED BIT(EV_EMPTY_PREDICATE) 27 #define ARM_SPE_IN_TXN BIT(EV_TRANSACTIONAL) 28 29 enum arm_spe_op_type { 30 /* First level operation type */ 31 ARM_SPE_OP_OTHER = 1 << 0, 32 ARM_SPE_OP_LDST = 1 << 1, 33 ARM_SPE_OP_BRANCH_ERET = 1 << 2, 34 35 /* Second level operation type for OTHER */ 36 ARM_SPE_OP_SVE_OTHER = 1 << 16, 37 ARM_SPE_OP_SVE_FP = 1 << 17, 38 ARM_SPE_OP_SVE_PRED_OTHER = 1 << 18, 39 40 /* Second level operation type for LDST */ 41 ARM_SPE_OP_LD = 1 << 16, 42 ARM_SPE_OP_ST = 1 << 17, 43 ARM_SPE_OP_ATOMIC = 1 << 18, 44 ARM_SPE_OP_EXCL = 1 << 19, 45 ARM_SPE_OP_AR = 1 << 20, 46 ARM_SPE_OP_SIMD_FP = 1 << 21, 47 ARM_SPE_OP_GP_REG = 1 << 22, 48 ARM_SPE_OP_UNSPEC_REG = 1 << 23, 49 ARM_SPE_OP_NV_SYSREG = 1 << 24, 50 ARM_SPE_OP_SVE_LDST = 1 << 25, 51 ARM_SPE_OP_SVE_PRED_LDST = 1 << 26, 52 ARM_SPE_OP_SVE_SG = 1 << 27, 53 54 /* Second level operation type for BRANCH_ERET */ 55 ARM_SPE_OP_BR_COND = 1 << 16, 56 ARM_SPE_OP_BR_INDIRECT = 1 << 17, 57 ARM_SPE_OP_BR_GCS = 1 << 18, 58 ARM_SPE_OP_BR_CR_BL = 1 << 19, 59 ARM_SPE_OP_BR_CR_RET = 1 << 20, 60 ARM_SPE_OP_BR_CR_NON_BL_RET = 1 << 21, 61 }; 62 63 enum arm_spe_common_data_source { 64 ARM_SPE_COMMON_DS_L1D = 0x0, 65 ARM_SPE_COMMON_DS_L2 = 0x8, 66 ARM_SPE_COMMON_DS_PEER_CORE = 0x9, 67 ARM_SPE_COMMON_DS_LOCAL_CLUSTER = 0xa, 68 ARM_SPE_COMMON_DS_SYS_CACHE = 0xb, 69 ARM_SPE_COMMON_DS_PEER_CLUSTER = 0xc, 70 ARM_SPE_COMMON_DS_REMOTE = 0xd, 71 ARM_SPE_COMMON_DS_DRAM = 0xe, 72 }; 73 74 enum arm_spe_ampereone_data_source { 75 ARM_SPE_AMPEREONE_LOCAL_CHIP_CACHE_OR_DEVICE = 0x0, 76 ARM_SPE_AMPEREONE_SLC = 0x3, 77 ARM_SPE_AMPEREONE_REMOTE_CHIP_CACHE = 0x5, 78 ARM_SPE_AMPEREONE_DDR = 0x7, 79 ARM_SPE_AMPEREONE_L1D = 0x8, 80 ARM_SPE_AMPEREONE_L2D = 0x9, 81 }; 82 83 enum arm_spe_hisi_hip_data_source { 84 ARM_SPE_HISI_HIP_PEER_CPU = 0, 85 ARM_SPE_HISI_HIP_PEER_CPU_HITM = 1, 86 ARM_SPE_HISI_HIP_L3 = 2, 87 ARM_SPE_HISI_HIP_L3_HITM = 3, 88 ARM_SPE_HISI_HIP_PEER_CLUSTER = 4, 89 ARM_SPE_HISI_HIP_PEER_CLUSTER_HITM = 5, 90 ARM_SPE_HISI_HIP_REMOTE_SOCKET = 6, 91 ARM_SPE_HISI_HIP_REMOTE_SOCKET_HITM = 7, 92 ARM_SPE_HISI_HIP_LOCAL_MEM = 8, 93 ARM_SPE_HISI_HIP_REMOTE_MEM = 9, 94 ARM_SPE_HISI_HIP_NC_DEV = 13, 95 ARM_SPE_HISI_HIP_L2 = 16, 96 ARM_SPE_HISI_HIP_L2_HITM = 17, 97 ARM_SPE_HISI_HIP_L1 = 18, 98 }; 99 100 struct arm_spe_record { 101 u64 type; 102 int err; 103 u32 op; 104 u32 latency; 105 u64 from_ip; 106 u64 to_ip; 107 u64 prev_br_tgt; 108 u64 timestamp; 109 u64 virt_addr; 110 u64 phys_addr; 111 u64 context_id; 112 u16 source; 113 }; 114 115 struct arm_spe_insn; 116 117 struct arm_spe_buffer { 118 const unsigned char *buf; 119 size_t len; 120 u64 offset; 121 u64 trace_nr; 122 }; 123 124 struct arm_spe_params { 125 int (*get_trace)(struct arm_spe_buffer *buffer, void *data); 126 void *data; 127 }; 128 129 struct arm_spe_decoder { 130 int (*get_trace)(struct arm_spe_buffer *buffer, void *data); 131 void *data; 132 struct arm_spe_record record; 133 134 const unsigned char *buf; 135 size_t len; 136 137 struct arm_spe_pkt packet; 138 }; 139 140 struct arm_spe_decoder *arm_spe_decoder_new(struct arm_spe_params *params); 141 void arm_spe_decoder_free(struct arm_spe_decoder *decoder); 142 143 int arm_spe_decode(struct arm_spe_decoder *decoder); 144 145 #endif 146