xref: /linux/tools/perf/pmu-events/arch/x86/westmereep-sp/floating-point.json (revision b8e85e6f3a09fc56b0ff574887798962ef8a8f80)
1[
2    {
3        "BriefDescription": "X87 Floating point assists (Precise Event)",
4        "EventCode": "0xF7",
5        "EventName": "FP_ASSIST.ALL",
6        "PEBS": "1",
7        "SampleAfterValue": "20000",
8        "UMask": "0x1"
9    },
10    {
11        "BriefDescription": "X87 Floating point assists for invalid input value (Precise Event)",
12        "EventCode": "0xF7",
13        "EventName": "FP_ASSIST.INPUT",
14        "PEBS": "1",
15        "SampleAfterValue": "20000",
16        "UMask": "0x4"
17    },
18    {
19        "BriefDescription": "X87 Floating point assists for invalid output value (Precise Event)",
20        "EventCode": "0xF7",
21        "EventName": "FP_ASSIST.OUTPUT",
22        "PEBS": "1",
23        "SampleAfterValue": "20000",
24        "UMask": "0x2"
25    },
26    {
27        "BriefDescription": "MMX Uops",
28        "EventCode": "0x10",
29        "EventName": "FP_COMP_OPS_EXE.MMX",
30        "SampleAfterValue": "2000000",
31        "UMask": "0x2"
32    },
33    {
34        "BriefDescription": "SSE2 integer Uops",
35        "EventCode": "0x10",
36        "EventName": "FP_COMP_OPS_EXE.SSE2_INTEGER",
37        "SampleAfterValue": "2000000",
38        "UMask": "0x8"
39    },
40    {
41        "BriefDescription": "SSE* FP double precision Uops",
42        "EventCode": "0x10",
43        "EventName": "FP_COMP_OPS_EXE.SSE_DOUBLE_PRECISION",
44        "SampleAfterValue": "2000000",
45        "UMask": "0x80"
46    },
47    {
48        "BriefDescription": "SSE and SSE2 FP Uops",
49        "EventCode": "0x10",
50        "EventName": "FP_COMP_OPS_EXE.SSE_FP",
51        "SampleAfterValue": "2000000",
52        "UMask": "0x4"
53    },
54    {
55        "BriefDescription": "SSE FP packed Uops",
56        "EventCode": "0x10",
57        "EventName": "FP_COMP_OPS_EXE.SSE_FP_PACKED",
58        "SampleAfterValue": "2000000",
59        "UMask": "0x10"
60    },
61    {
62        "BriefDescription": "SSE FP scalar Uops",
63        "EventCode": "0x10",
64        "EventName": "FP_COMP_OPS_EXE.SSE_FP_SCALAR",
65        "SampleAfterValue": "2000000",
66        "UMask": "0x20"
67    },
68    {
69        "BriefDescription": "SSE* FP single precision Uops",
70        "EventCode": "0x10",
71        "EventName": "FP_COMP_OPS_EXE.SSE_SINGLE_PRECISION",
72        "SampleAfterValue": "2000000",
73        "UMask": "0x40"
74    },
75    {
76        "BriefDescription": "Computational floating-point operations executed",
77        "EventCode": "0x10",
78        "EventName": "FP_COMP_OPS_EXE.X87",
79        "SampleAfterValue": "2000000",
80        "UMask": "0x1"
81    },
82    {
83        "BriefDescription": "All Floating Point to and from MMX transitions",
84        "EventCode": "0xCC",
85        "EventName": "FP_MMX_TRANS.ANY",
86        "SampleAfterValue": "2000000",
87        "UMask": "0x3"
88    },
89    {
90        "BriefDescription": "Transitions from MMX to Floating Point instructions",
91        "EventCode": "0xCC",
92        "EventName": "FP_MMX_TRANS.TO_FP",
93        "SampleAfterValue": "2000000",
94        "UMask": "0x1"
95    },
96    {
97        "BriefDescription": "Transitions from Floating Point to MMX instructions",
98        "EventCode": "0xCC",
99        "EventName": "FP_MMX_TRANS.TO_MMX",
100        "SampleAfterValue": "2000000",
101        "UMask": "0x2"
102    },
103    {
104        "BriefDescription": "128 bit SIMD integer pack operations",
105        "EventCode": "0x12",
106        "EventName": "SIMD_INT_128.PACK",
107        "SampleAfterValue": "200000",
108        "UMask": "0x4"
109    },
110    {
111        "BriefDescription": "128 bit SIMD integer arithmetic operations",
112        "EventCode": "0x12",
113        "EventName": "SIMD_INT_128.PACKED_ARITH",
114        "SampleAfterValue": "200000",
115        "UMask": "0x20"
116    },
117    {
118        "BriefDescription": "128 bit SIMD integer logical operations",
119        "EventCode": "0x12",
120        "EventName": "SIMD_INT_128.PACKED_LOGICAL",
121        "SampleAfterValue": "200000",
122        "UMask": "0x10"
123    },
124    {
125        "BriefDescription": "128 bit SIMD integer multiply operations",
126        "EventCode": "0x12",
127        "EventName": "SIMD_INT_128.PACKED_MPY",
128        "SampleAfterValue": "200000",
129        "UMask": "0x1"
130    },
131    {
132        "BriefDescription": "128 bit SIMD integer shift operations",
133        "EventCode": "0x12",
134        "EventName": "SIMD_INT_128.PACKED_SHIFT",
135        "SampleAfterValue": "200000",
136        "UMask": "0x2"
137    },
138    {
139        "BriefDescription": "128 bit SIMD integer shuffle/move operations",
140        "EventCode": "0x12",
141        "EventName": "SIMD_INT_128.SHUFFLE_MOVE",
142        "SampleAfterValue": "200000",
143        "UMask": "0x40"
144    },
145    {
146        "BriefDescription": "128 bit SIMD integer unpack operations",
147        "EventCode": "0x12",
148        "EventName": "SIMD_INT_128.UNPACK",
149        "SampleAfterValue": "200000",
150        "UMask": "0x8"
151    },
152    {
153        "BriefDescription": "SIMD integer 64 bit pack operations",
154        "EventCode": "0xFD",
155        "EventName": "SIMD_INT_64.PACK",
156        "SampleAfterValue": "200000",
157        "UMask": "0x4"
158    },
159    {
160        "BriefDescription": "SIMD integer 64 bit arithmetic operations",
161        "EventCode": "0xFD",
162        "EventName": "SIMD_INT_64.PACKED_ARITH",
163        "SampleAfterValue": "200000",
164        "UMask": "0x20"
165    },
166    {
167        "BriefDescription": "SIMD integer 64 bit logical operations",
168        "EventCode": "0xFD",
169        "EventName": "SIMD_INT_64.PACKED_LOGICAL",
170        "SampleAfterValue": "200000",
171        "UMask": "0x10"
172    },
173    {
174        "BriefDescription": "SIMD integer 64 bit packed multiply operations",
175        "EventCode": "0xFD",
176        "EventName": "SIMD_INT_64.PACKED_MPY",
177        "SampleAfterValue": "200000",
178        "UMask": "0x1"
179    },
180    {
181        "BriefDescription": "SIMD integer 64 bit shift operations",
182        "EventCode": "0xFD",
183        "EventName": "SIMD_INT_64.PACKED_SHIFT",
184        "SampleAfterValue": "200000",
185        "UMask": "0x2"
186    },
187    {
188        "BriefDescription": "SIMD integer 64 bit shuffle/move operations",
189        "EventCode": "0xFD",
190        "EventName": "SIMD_INT_64.SHUFFLE_MOVE",
191        "SampleAfterValue": "200000",
192        "UMask": "0x40"
193    },
194    {
195        "BriefDescription": "SIMD integer 64 bit unpack operations",
196        "EventCode": "0xFD",
197        "EventName": "SIMD_INT_64.UNPACK",
198        "SampleAfterValue": "200000",
199        "UMask": "0x8"
200    }
201]
202