1*1f888acdSAndi Kleen[ 2*1f888acdSAndi Kleen { 3*1f888acdSAndi Kleen "EventCode": "0x14", 4*1f888acdSAndi Kleen "Counter": "0,1,2,3", 5*1f888acdSAndi Kleen "UMask": "0x1", 6*1f888acdSAndi Kleen "EventName": "ARITH.CYCLES_DIV_BUSY", 7*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 8*1f888acdSAndi Kleen "BriefDescription": "Cycles the divider is busy" 9*1f888acdSAndi Kleen }, 10*1f888acdSAndi Kleen { 11*1f888acdSAndi Kleen "EventCode": "0x14", 12*1f888acdSAndi Kleen "Invert": "1", 13*1f888acdSAndi Kleen "Counter": "0,1,2,3", 14*1f888acdSAndi Kleen "UMask": "0x1", 15*1f888acdSAndi Kleen "EventName": "ARITH.DIV", 16*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 17*1f888acdSAndi Kleen "BriefDescription": "Divide Operations executed", 18*1f888acdSAndi Kleen "CounterMask": "1", 19*1f888acdSAndi Kleen "EdgeDetect": "1" 20*1f888acdSAndi Kleen }, 21*1f888acdSAndi Kleen { 22*1f888acdSAndi Kleen "EventCode": "0x14", 23*1f888acdSAndi Kleen "Counter": "0,1,2,3", 24*1f888acdSAndi Kleen "UMask": "0x2", 25*1f888acdSAndi Kleen "EventName": "ARITH.MUL", 26*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 27*1f888acdSAndi Kleen "BriefDescription": "Multiply operations executed" 28*1f888acdSAndi Kleen }, 29*1f888acdSAndi Kleen { 30*1f888acdSAndi Kleen "EventCode": "0xE6", 31*1f888acdSAndi Kleen "Counter": "0,1,2,3", 32*1f888acdSAndi Kleen "UMask": "0x2", 33*1f888acdSAndi Kleen "EventName": "BACLEAR.BAD_TARGET", 34*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 35*1f888acdSAndi Kleen "BriefDescription": "BACLEAR asserted with bad target address" 36*1f888acdSAndi Kleen }, 37*1f888acdSAndi Kleen { 38*1f888acdSAndi Kleen "EventCode": "0xE6", 39*1f888acdSAndi Kleen "Counter": "0,1,2,3", 40*1f888acdSAndi Kleen "UMask": "0x1", 41*1f888acdSAndi Kleen "EventName": "BACLEAR.CLEAR", 42*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 43*1f888acdSAndi Kleen "BriefDescription": "BACLEAR asserted, regardless of cause " 44*1f888acdSAndi Kleen }, 45*1f888acdSAndi Kleen { 46*1f888acdSAndi Kleen "EventCode": "0xA7", 47*1f888acdSAndi Kleen "Counter": "0,1,2,3", 48*1f888acdSAndi Kleen "UMask": "0x1", 49*1f888acdSAndi Kleen "EventName": "BACLEAR_FORCE_IQ", 50*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 51*1f888acdSAndi Kleen "BriefDescription": "Instruction queue forced BACLEAR" 52*1f888acdSAndi Kleen }, 53*1f888acdSAndi Kleen { 54*1f888acdSAndi Kleen "EventCode": "0xE0", 55*1f888acdSAndi Kleen "Counter": "0,1,2,3", 56*1f888acdSAndi Kleen "UMask": "0x1", 57*1f888acdSAndi Kleen "EventName": "BR_INST_DECODED", 58*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 59*1f888acdSAndi Kleen "BriefDescription": "Branch instructions decoded" 60*1f888acdSAndi Kleen }, 61*1f888acdSAndi Kleen { 62*1f888acdSAndi Kleen "EventCode": "0x88", 63*1f888acdSAndi Kleen "Counter": "0,1,2,3", 64*1f888acdSAndi Kleen "UMask": "0x7f", 65*1f888acdSAndi Kleen "EventName": "BR_INST_EXEC.ANY", 66*1f888acdSAndi Kleen "SampleAfterValue": "200000", 67*1f888acdSAndi Kleen "BriefDescription": "Branch instructions executed" 68*1f888acdSAndi Kleen }, 69*1f888acdSAndi Kleen { 70*1f888acdSAndi Kleen "EventCode": "0x88", 71*1f888acdSAndi Kleen "Counter": "0,1,2,3", 72*1f888acdSAndi Kleen "UMask": "0x1", 73*1f888acdSAndi Kleen "EventName": "BR_INST_EXEC.COND", 74*1f888acdSAndi Kleen "SampleAfterValue": "200000", 75*1f888acdSAndi Kleen "BriefDescription": "Conditional branch instructions executed" 76*1f888acdSAndi Kleen }, 77*1f888acdSAndi Kleen { 78*1f888acdSAndi Kleen "EventCode": "0x88", 79*1f888acdSAndi Kleen "Counter": "0,1,2,3", 80*1f888acdSAndi Kleen "UMask": "0x2", 81*1f888acdSAndi Kleen "EventName": "BR_INST_EXEC.DIRECT", 82*1f888acdSAndi Kleen "SampleAfterValue": "200000", 83*1f888acdSAndi Kleen "BriefDescription": "Unconditional branches executed" 84*1f888acdSAndi Kleen }, 85*1f888acdSAndi Kleen { 86*1f888acdSAndi Kleen "EventCode": "0x88", 87*1f888acdSAndi Kleen "Counter": "0,1,2,3", 88*1f888acdSAndi Kleen "UMask": "0x10", 89*1f888acdSAndi Kleen "EventName": "BR_INST_EXEC.DIRECT_NEAR_CALL", 90*1f888acdSAndi Kleen "SampleAfterValue": "20000", 91*1f888acdSAndi Kleen "BriefDescription": "Unconditional call branches executed" 92*1f888acdSAndi Kleen }, 93*1f888acdSAndi Kleen { 94*1f888acdSAndi Kleen "EventCode": "0x88", 95*1f888acdSAndi Kleen "Counter": "0,1,2,3", 96*1f888acdSAndi Kleen "UMask": "0x20", 97*1f888acdSAndi Kleen "EventName": "BR_INST_EXEC.INDIRECT_NEAR_CALL", 98*1f888acdSAndi Kleen "SampleAfterValue": "20000", 99*1f888acdSAndi Kleen "BriefDescription": "Indirect call branches executed" 100*1f888acdSAndi Kleen }, 101*1f888acdSAndi Kleen { 102*1f888acdSAndi Kleen "EventCode": "0x88", 103*1f888acdSAndi Kleen "Counter": "0,1,2,3", 104*1f888acdSAndi Kleen "UMask": "0x4", 105*1f888acdSAndi Kleen "EventName": "BR_INST_EXEC.INDIRECT_NON_CALL", 106*1f888acdSAndi Kleen "SampleAfterValue": "20000", 107*1f888acdSAndi Kleen "BriefDescription": "Indirect non call branches executed" 108*1f888acdSAndi Kleen }, 109*1f888acdSAndi Kleen { 110*1f888acdSAndi Kleen "EventCode": "0x88", 111*1f888acdSAndi Kleen "Counter": "0,1,2,3", 112*1f888acdSAndi Kleen "UMask": "0x30", 113*1f888acdSAndi Kleen "EventName": "BR_INST_EXEC.NEAR_CALLS", 114*1f888acdSAndi Kleen "SampleAfterValue": "20000", 115*1f888acdSAndi Kleen "BriefDescription": "Call branches executed" 116*1f888acdSAndi Kleen }, 117*1f888acdSAndi Kleen { 118*1f888acdSAndi Kleen "EventCode": "0x88", 119*1f888acdSAndi Kleen "Counter": "0,1,2,3", 120*1f888acdSAndi Kleen "UMask": "0x7", 121*1f888acdSAndi Kleen "EventName": "BR_INST_EXEC.NON_CALLS", 122*1f888acdSAndi Kleen "SampleAfterValue": "200000", 123*1f888acdSAndi Kleen "BriefDescription": "All non call branches executed" 124*1f888acdSAndi Kleen }, 125*1f888acdSAndi Kleen { 126*1f888acdSAndi Kleen "EventCode": "0x88", 127*1f888acdSAndi Kleen "Counter": "0,1,2,3", 128*1f888acdSAndi Kleen "UMask": "0x8", 129*1f888acdSAndi Kleen "EventName": "BR_INST_EXEC.RETURN_NEAR", 130*1f888acdSAndi Kleen "SampleAfterValue": "20000", 131*1f888acdSAndi Kleen "BriefDescription": "Indirect return branches executed" 132*1f888acdSAndi Kleen }, 133*1f888acdSAndi Kleen { 134*1f888acdSAndi Kleen "EventCode": "0x88", 135*1f888acdSAndi Kleen "Counter": "0,1,2,3", 136*1f888acdSAndi Kleen "UMask": "0x40", 137*1f888acdSAndi Kleen "EventName": "BR_INST_EXEC.TAKEN", 138*1f888acdSAndi Kleen "SampleAfterValue": "200000", 139*1f888acdSAndi Kleen "BriefDescription": "Taken branches executed" 140*1f888acdSAndi Kleen }, 141*1f888acdSAndi Kleen { 142*1f888acdSAndi Kleen "PEBS": "1", 143*1f888acdSAndi Kleen "EventCode": "0xC4", 144*1f888acdSAndi Kleen "Counter": "0,1,2,3", 145*1f888acdSAndi Kleen "UMask": "0x4", 146*1f888acdSAndi Kleen "EventName": "BR_INST_RETIRED.ALL_BRANCHES", 147*1f888acdSAndi Kleen "SampleAfterValue": "200000", 148*1f888acdSAndi Kleen "BriefDescription": "Retired branch instructions (Precise Event)" 149*1f888acdSAndi Kleen }, 150*1f888acdSAndi Kleen { 151*1f888acdSAndi Kleen "PEBS": "1", 152*1f888acdSAndi Kleen "EventCode": "0xC4", 153*1f888acdSAndi Kleen "Counter": "0,1,2,3", 154*1f888acdSAndi Kleen "UMask": "0x1", 155*1f888acdSAndi Kleen "EventName": "BR_INST_RETIRED.CONDITIONAL", 156*1f888acdSAndi Kleen "SampleAfterValue": "200000", 157*1f888acdSAndi Kleen "BriefDescription": "Retired conditional branch instructions (Precise Event)" 158*1f888acdSAndi Kleen }, 159*1f888acdSAndi Kleen { 160*1f888acdSAndi Kleen "PEBS": "1", 161*1f888acdSAndi Kleen "EventCode": "0xC4", 162*1f888acdSAndi Kleen "Counter": "0,1,2,3", 163*1f888acdSAndi Kleen "UMask": "0x2", 164*1f888acdSAndi Kleen "EventName": "BR_INST_RETIRED.NEAR_CALL", 165*1f888acdSAndi Kleen "SampleAfterValue": "20000", 166*1f888acdSAndi Kleen "BriefDescription": "Retired near call instructions (Precise Event)" 167*1f888acdSAndi Kleen }, 168*1f888acdSAndi Kleen { 169*1f888acdSAndi Kleen "EventCode": "0x89", 170*1f888acdSAndi Kleen "Counter": "0,1,2,3", 171*1f888acdSAndi Kleen "UMask": "0x7f", 172*1f888acdSAndi Kleen "EventName": "BR_MISP_EXEC.ANY", 173*1f888acdSAndi Kleen "SampleAfterValue": "20000", 174*1f888acdSAndi Kleen "BriefDescription": "Mispredicted branches executed" 175*1f888acdSAndi Kleen }, 176*1f888acdSAndi Kleen { 177*1f888acdSAndi Kleen "EventCode": "0x89", 178*1f888acdSAndi Kleen "Counter": "0,1,2,3", 179*1f888acdSAndi Kleen "UMask": "0x1", 180*1f888acdSAndi Kleen "EventName": "BR_MISP_EXEC.COND", 181*1f888acdSAndi Kleen "SampleAfterValue": "20000", 182*1f888acdSAndi Kleen "BriefDescription": "Mispredicted conditional branches executed" 183*1f888acdSAndi Kleen }, 184*1f888acdSAndi Kleen { 185*1f888acdSAndi Kleen "EventCode": "0x89", 186*1f888acdSAndi Kleen "Counter": "0,1,2,3", 187*1f888acdSAndi Kleen "UMask": "0x2", 188*1f888acdSAndi Kleen "EventName": "BR_MISP_EXEC.DIRECT", 189*1f888acdSAndi Kleen "SampleAfterValue": "20000", 190*1f888acdSAndi Kleen "BriefDescription": "Mispredicted unconditional branches executed" 191*1f888acdSAndi Kleen }, 192*1f888acdSAndi Kleen { 193*1f888acdSAndi Kleen "EventCode": "0x89", 194*1f888acdSAndi Kleen "Counter": "0,1,2,3", 195*1f888acdSAndi Kleen "UMask": "0x10", 196*1f888acdSAndi Kleen "EventName": "BR_MISP_EXEC.DIRECT_NEAR_CALL", 197*1f888acdSAndi Kleen "SampleAfterValue": "2000", 198*1f888acdSAndi Kleen "BriefDescription": "Mispredicted non call branches executed" 199*1f888acdSAndi Kleen }, 200*1f888acdSAndi Kleen { 201*1f888acdSAndi Kleen "EventCode": "0x89", 202*1f888acdSAndi Kleen "Counter": "0,1,2,3", 203*1f888acdSAndi Kleen "UMask": "0x20", 204*1f888acdSAndi Kleen "EventName": "BR_MISP_EXEC.INDIRECT_NEAR_CALL", 205*1f888acdSAndi Kleen "SampleAfterValue": "2000", 206*1f888acdSAndi Kleen "BriefDescription": "Mispredicted indirect call branches executed" 207*1f888acdSAndi Kleen }, 208*1f888acdSAndi Kleen { 209*1f888acdSAndi Kleen "EventCode": "0x89", 210*1f888acdSAndi Kleen "Counter": "0,1,2,3", 211*1f888acdSAndi Kleen "UMask": "0x4", 212*1f888acdSAndi Kleen "EventName": "BR_MISP_EXEC.INDIRECT_NON_CALL", 213*1f888acdSAndi Kleen "SampleAfterValue": "2000", 214*1f888acdSAndi Kleen "BriefDescription": "Mispredicted indirect non call branches executed" 215*1f888acdSAndi Kleen }, 216*1f888acdSAndi Kleen { 217*1f888acdSAndi Kleen "EventCode": "0x89", 218*1f888acdSAndi Kleen "Counter": "0,1,2,3", 219*1f888acdSAndi Kleen "UMask": "0x30", 220*1f888acdSAndi Kleen "EventName": "BR_MISP_EXEC.NEAR_CALLS", 221*1f888acdSAndi Kleen "SampleAfterValue": "2000", 222*1f888acdSAndi Kleen "BriefDescription": "Mispredicted call branches executed" 223*1f888acdSAndi Kleen }, 224*1f888acdSAndi Kleen { 225*1f888acdSAndi Kleen "EventCode": "0x89", 226*1f888acdSAndi Kleen "Counter": "0,1,2,3", 227*1f888acdSAndi Kleen "UMask": "0x7", 228*1f888acdSAndi Kleen "EventName": "BR_MISP_EXEC.NON_CALLS", 229*1f888acdSAndi Kleen "SampleAfterValue": "20000", 230*1f888acdSAndi Kleen "BriefDescription": "Mispredicted non call branches executed" 231*1f888acdSAndi Kleen }, 232*1f888acdSAndi Kleen { 233*1f888acdSAndi Kleen "EventCode": "0x89", 234*1f888acdSAndi Kleen "Counter": "0,1,2,3", 235*1f888acdSAndi Kleen "UMask": "0x8", 236*1f888acdSAndi Kleen "EventName": "BR_MISP_EXEC.RETURN_NEAR", 237*1f888acdSAndi Kleen "SampleAfterValue": "2000", 238*1f888acdSAndi Kleen "BriefDescription": "Mispredicted return branches executed" 239*1f888acdSAndi Kleen }, 240*1f888acdSAndi Kleen { 241*1f888acdSAndi Kleen "EventCode": "0x89", 242*1f888acdSAndi Kleen "Counter": "0,1,2,3", 243*1f888acdSAndi Kleen "UMask": "0x40", 244*1f888acdSAndi Kleen "EventName": "BR_MISP_EXEC.TAKEN", 245*1f888acdSAndi Kleen "SampleAfterValue": "20000", 246*1f888acdSAndi Kleen "BriefDescription": "Mispredicted taken branches executed" 247*1f888acdSAndi Kleen }, 248*1f888acdSAndi Kleen { 249*1f888acdSAndi Kleen "PEBS": "1", 250*1f888acdSAndi Kleen "EventCode": "0xC5", 251*1f888acdSAndi Kleen "Counter": "0,1,2,3", 252*1f888acdSAndi Kleen "UMask": "0x4", 253*1f888acdSAndi Kleen "EventName": "BR_MISP_RETIRED.ALL_BRANCHES", 254*1f888acdSAndi Kleen "SampleAfterValue": "20000", 255*1f888acdSAndi Kleen "BriefDescription": "Mispredicted retired branch instructions (Precise Event)" 256*1f888acdSAndi Kleen }, 257*1f888acdSAndi Kleen { 258*1f888acdSAndi Kleen "PEBS": "1", 259*1f888acdSAndi Kleen "EventCode": "0xC5", 260*1f888acdSAndi Kleen "Counter": "0,1,2,3", 261*1f888acdSAndi Kleen "UMask": "0x1", 262*1f888acdSAndi Kleen "EventName": "BR_MISP_RETIRED.CONDITIONAL", 263*1f888acdSAndi Kleen "SampleAfterValue": "20000", 264*1f888acdSAndi Kleen "BriefDescription": "Mispredicted conditional retired branches (Precise Event)" 265*1f888acdSAndi Kleen }, 266*1f888acdSAndi Kleen { 267*1f888acdSAndi Kleen "PEBS": "1", 268*1f888acdSAndi Kleen "EventCode": "0xC5", 269*1f888acdSAndi Kleen "Counter": "0,1,2,3", 270*1f888acdSAndi Kleen "UMask": "0x2", 271*1f888acdSAndi Kleen "EventName": "BR_MISP_RETIRED.NEAR_CALL", 272*1f888acdSAndi Kleen "SampleAfterValue": "2000", 273*1f888acdSAndi Kleen "BriefDescription": "Mispredicted near retired calls (Precise Event)" 274*1f888acdSAndi Kleen }, 275*1f888acdSAndi Kleen { 276*1f888acdSAndi Kleen "EventCode": "0x0", 277*1f888acdSAndi Kleen "Counter": "Fixed counter 3", 278*1f888acdSAndi Kleen "UMask": "0x0", 279*1f888acdSAndi Kleen "EventName": "CPU_CLK_UNHALTED.REF", 280*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 281*1f888acdSAndi Kleen "BriefDescription": "Reference cycles when thread is not halted (fixed counter)" 282*1f888acdSAndi Kleen }, 283*1f888acdSAndi Kleen { 284*1f888acdSAndi Kleen "EventCode": "0x3C", 285*1f888acdSAndi Kleen "Counter": "0,1,2,3", 286*1f888acdSAndi Kleen "UMask": "0x1", 287*1f888acdSAndi Kleen "EventName": "CPU_CLK_UNHALTED.REF_P", 288*1f888acdSAndi Kleen "SampleAfterValue": "100000", 289*1f888acdSAndi Kleen "BriefDescription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)" 290*1f888acdSAndi Kleen }, 291*1f888acdSAndi Kleen { 292*1f888acdSAndi Kleen "EventCode": "0x0", 293*1f888acdSAndi Kleen "Counter": "Fixed counter 2", 294*1f888acdSAndi Kleen "UMask": "0x0", 295*1f888acdSAndi Kleen "EventName": "CPU_CLK_UNHALTED.THREAD", 296*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 297*1f888acdSAndi Kleen "BriefDescription": "Cycles when thread is not halted (fixed counter)" 298*1f888acdSAndi Kleen }, 299*1f888acdSAndi Kleen { 300*1f888acdSAndi Kleen "EventCode": "0x3C", 301*1f888acdSAndi Kleen "Counter": "0,1,2,3", 302*1f888acdSAndi Kleen "UMask": "0x0", 303*1f888acdSAndi Kleen "EventName": "CPU_CLK_UNHALTED.THREAD_P", 304*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 305*1f888acdSAndi Kleen "BriefDescription": "Cycles when thread is not halted (programmable counter)" 306*1f888acdSAndi Kleen }, 307*1f888acdSAndi Kleen { 308*1f888acdSAndi Kleen "EventCode": "0x3C", 309*1f888acdSAndi Kleen "Invert": "1", 310*1f888acdSAndi Kleen "Counter": "0,1,2,3", 311*1f888acdSAndi Kleen "UMask": "0x0", 312*1f888acdSAndi Kleen "EventName": "CPU_CLK_UNHALTED.TOTAL_CYCLES", 313*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 314*1f888acdSAndi Kleen "BriefDescription": "Total CPU cycles", 315*1f888acdSAndi Kleen "CounterMask": "2" 316*1f888acdSAndi Kleen }, 317*1f888acdSAndi Kleen { 318*1f888acdSAndi Kleen "EventCode": "0x87", 319*1f888acdSAndi Kleen "Counter": "0,1,2,3", 320*1f888acdSAndi Kleen "UMask": "0xf", 321*1f888acdSAndi Kleen "EventName": "ILD_STALL.ANY", 322*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 323*1f888acdSAndi Kleen "BriefDescription": "Any Instruction Length Decoder stall cycles" 324*1f888acdSAndi Kleen }, 325*1f888acdSAndi Kleen { 326*1f888acdSAndi Kleen "EventCode": "0x87", 327*1f888acdSAndi Kleen "Counter": "0,1,2,3", 328*1f888acdSAndi Kleen "UMask": "0x4", 329*1f888acdSAndi Kleen "EventName": "ILD_STALL.IQ_FULL", 330*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 331*1f888acdSAndi Kleen "BriefDescription": "Instruction Queue full stall cycles" 332*1f888acdSAndi Kleen }, 333*1f888acdSAndi Kleen { 334*1f888acdSAndi Kleen "EventCode": "0x87", 335*1f888acdSAndi Kleen "Counter": "0,1,2,3", 336*1f888acdSAndi Kleen "UMask": "0x1", 337*1f888acdSAndi Kleen "EventName": "ILD_STALL.LCP", 338*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 339*1f888acdSAndi Kleen "BriefDescription": "Length Change Prefix stall cycles" 340*1f888acdSAndi Kleen }, 341*1f888acdSAndi Kleen { 342*1f888acdSAndi Kleen "EventCode": "0x87", 343*1f888acdSAndi Kleen "Counter": "0,1,2,3", 344*1f888acdSAndi Kleen "UMask": "0x2", 345*1f888acdSAndi Kleen "EventName": "ILD_STALL.MRU", 346*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 347*1f888acdSAndi Kleen "BriefDescription": "Stall cycles due to BPU MRU bypass" 348*1f888acdSAndi Kleen }, 349*1f888acdSAndi Kleen { 350*1f888acdSAndi Kleen "EventCode": "0x87", 351*1f888acdSAndi Kleen "Counter": "0,1,2,3", 352*1f888acdSAndi Kleen "UMask": "0x8", 353*1f888acdSAndi Kleen "EventName": "ILD_STALL.REGEN", 354*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 355*1f888acdSAndi Kleen "BriefDescription": "Regen stall cycles" 356*1f888acdSAndi Kleen }, 357*1f888acdSAndi Kleen { 358*1f888acdSAndi Kleen "EventCode": "0x18", 359*1f888acdSAndi Kleen "Counter": "0,1,2,3", 360*1f888acdSAndi Kleen "UMask": "0x1", 361*1f888acdSAndi Kleen "EventName": "INST_DECODED.DEC0", 362*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 363*1f888acdSAndi Kleen "BriefDescription": "Instructions that must be decoded by decoder 0" 364*1f888acdSAndi Kleen }, 365*1f888acdSAndi Kleen { 366*1f888acdSAndi Kleen "EventCode": "0x1E", 367*1f888acdSAndi Kleen "Counter": "0,1,2,3", 368*1f888acdSAndi Kleen "UMask": "0x1", 369*1f888acdSAndi Kleen "EventName": "INST_QUEUE_WRITE_CYCLES", 370*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 371*1f888acdSAndi Kleen "BriefDescription": "Cycles instructions are written to the instruction queue" 372*1f888acdSAndi Kleen }, 373*1f888acdSAndi Kleen { 374*1f888acdSAndi Kleen "EventCode": "0x17", 375*1f888acdSAndi Kleen "Counter": "0,1,2,3", 376*1f888acdSAndi Kleen "UMask": "0x1", 377*1f888acdSAndi Kleen "EventName": "INST_QUEUE_WRITES", 378*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 379*1f888acdSAndi Kleen "BriefDescription": "Instructions written to instruction queue." 380*1f888acdSAndi Kleen }, 381*1f888acdSAndi Kleen { 382*1f888acdSAndi Kleen "EventCode": "0x0", 383*1f888acdSAndi Kleen "Counter": "Fixed counter 1", 384*1f888acdSAndi Kleen "UMask": "0x0", 385*1f888acdSAndi Kleen "EventName": "INST_RETIRED.ANY", 386*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 387*1f888acdSAndi Kleen "BriefDescription": "Instructions retired (fixed counter)" 388*1f888acdSAndi Kleen }, 389*1f888acdSAndi Kleen { 390*1f888acdSAndi Kleen "PEBS": "1", 391*1f888acdSAndi Kleen "EventCode": "0xC0", 392*1f888acdSAndi Kleen "Counter": "0,1,2,3", 393*1f888acdSAndi Kleen "UMask": "0x1", 394*1f888acdSAndi Kleen "EventName": "INST_RETIRED.ANY_P", 395*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 396*1f888acdSAndi Kleen "BriefDescription": "Instructions retired (Programmable counter and Precise Event)" 397*1f888acdSAndi Kleen }, 398*1f888acdSAndi Kleen { 399*1f888acdSAndi Kleen "PEBS": "1", 400*1f888acdSAndi Kleen "EventCode": "0xC0", 401*1f888acdSAndi Kleen "Counter": "0,1,2,3", 402*1f888acdSAndi Kleen "UMask": "0x4", 403*1f888acdSAndi Kleen "EventName": "INST_RETIRED.MMX", 404*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 405*1f888acdSAndi Kleen "BriefDescription": "Retired MMX instructions (Precise Event)" 406*1f888acdSAndi Kleen }, 407*1f888acdSAndi Kleen { 408*1f888acdSAndi Kleen "PEBS": "1", 409*1f888acdSAndi Kleen "EventCode": "0xC0", 410*1f888acdSAndi Kleen "Invert": "1", 411*1f888acdSAndi Kleen "Counter": "0,1,2,3", 412*1f888acdSAndi Kleen "UMask": "0x1", 413*1f888acdSAndi Kleen "EventName": "INST_RETIRED.TOTAL_CYCLES", 414*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 415*1f888acdSAndi Kleen "BriefDescription": "Total cycles (Precise Event)", 416*1f888acdSAndi Kleen "CounterMask": "16" 417*1f888acdSAndi Kleen }, 418*1f888acdSAndi Kleen { 419*1f888acdSAndi Kleen "PEBS": "1", 420*1f888acdSAndi Kleen "EventCode": "0xC0", 421*1f888acdSAndi Kleen "Counter": "0,1,2,3", 422*1f888acdSAndi Kleen "UMask": "0x2", 423*1f888acdSAndi Kleen "EventName": "INST_RETIRED.X87", 424*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 425*1f888acdSAndi Kleen "BriefDescription": "Retired floating-point operations (Precise Event)" 426*1f888acdSAndi Kleen }, 427*1f888acdSAndi Kleen { 428*1f888acdSAndi Kleen "EventCode": "0x4C", 429*1f888acdSAndi Kleen "Counter": "0,1", 430*1f888acdSAndi Kleen "UMask": "0x1", 431*1f888acdSAndi Kleen "EventName": "LOAD_HIT_PRE", 432*1f888acdSAndi Kleen "SampleAfterValue": "200000", 433*1f888acdSAndi Kleen "BriefDescription": "Load operations conflicting with software prefetches" 434*1f888acdSAndi Kleen }, 435*1f888acdSAndi Kleen { 436*1f888acdSAndi Kleen "EventCode": "0xA8", 437*1f888acdSAndi Kleen "Counter": "0,1,2,3", 438*1f888acdSAndi Kleen "UMask": "0x1", 439*1f888acdSAndi Kleen "EventName": "LSD.ACTIVE", 440*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 441*1f888acdSAndi Kleen "BriefDescription": "Cycles when uops were delivered by the LSD", 442*1f888acdSAndi Kleen "CounterMask": "1" 443*1f888acdSAndi Kleen }, 444*1f888acdSAndi Kleen { 445*1f888acdSAndi Kleen "EventCode": "0xA8", 446*1f888acdSAndi Kleen "Invert": "1", 447*1f888acdSAndi Kleen "Counter": "0,1,2,3", 448*1f888acdSAndi Kleen "UMask": "0x1", 449*1f888acdSAndi Kleen "EventName": "LSD.INACTIVE", 450*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 451*1f888acdSAndi Kleen "BriefDescription": "Cycles no uops were delivered by the LSD", 452*1f888acdSAndi Kleen "CounterMask": "1" 453*1f888acdSAndi Kleen }, 454*1f888acdSAndi Kleen { 455*1f888acdSAndi Kleen "EventCode": "0x20", 456*1f888acdSAndi Kleen "Counter": "0,1,2,3", 457*1f888acdSAndi Kleen "UMask": "0x1", 458*1f888acdSAndi Kleen "EventName": "LSD_OVERFLOW", 459*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 460*1f888acdSAndi Kleen "BriefDescription": "Loops that can't stream from the instruction queue" 461*1f888acdSAndi Kleen }, 462*1f888acdSAndi Kleen { 463*1f888acdSAndi Kleen "EventCode": "0xC3", 464*1f888acdSAndi Kleen "Counter": "0,1,2,3", 465*1f888acdSAndi Kleen "UMask": "0x1", 466*1f888acdSAndi Kleen "EventName": "MACHINE_CLEARS.CYCLES", 467*1f888acdSAndi Kleen "SampleAfterValue": "20000", 468*1f888acdSAndi Kleen "BriefDescription": "Cycles machine clear asserted" 469*1f888acdSAndi Kleen }, 470*1f888acdSAndi Kleen { 471*1f888acdSAndi Kleen "EventCode": "0xC3", 472*1f888acdSAndi Kleen "Counter": "0,1,2,3", 473*1f888acdSAndi Kleen "UMask": "0x2", 474*1f888acdSAndi Kleen "EventName": "MACHINE_CLEARS.MEM_ORDER", 475*1f888acdSAndi Kleen "SampleAfterValue": "20000", 476*1f888acdSAndi Kleen "BriefDescription": "Execution pipeline restart due to Memory ordering conflicts" 477*1f888acdSAndi Kleen }, 478*1f888acdSAndi Kleen { 479*1f888acdSAndi Kleen "EventCode": "0xC3", 480*1f888acdSAndi Kleen "Counter": "0,1,2,3", 481*1f888acdSAndi Kleen "UMask": "0x4", 482*1f888acdSAndi Kleen "EventName": "MACHINE_CLEARS.SMC", 483*1f888acdSAndi Kleen "SampleAfterValue": "20000", 484*1f888acdSAndi Kleen "BriefDescription": "Self-Modifying Code detected" 485*1f888acdSAndi Kleen }, 486*1f888acdSAndi Kleen { 487*1f888acdSAndi Kleen "EventCode": "0xA2", 488*1f888acdSAndi Kleen "Counter": "0,1,2,3", 489*1f888acdSAndi Kleen "UMask": "0x1", 490*1f888acdSAndi Kleen "EventName": "RESOURCE_STALLS.ANY", 491*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 492*1f888acdSAndi Kleen "BriefDescription": "Resource related stall cycles" 493*1f888acdSAndi Kleen }, 494*1f888acdSAndi Kleen { 495*1f888acdSAndi Kleen "EventCode": "0xA2", 496*1f888acdSAndi Kleen "Counter": "0,1,2,3", 497*1f888acdSAndi Kleen "UMask": "0x20", 498*1f888acdSAndi Kleen "EventName": "RESOURCE_STALLS.FPCW", 499*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 500*1f888acdSAndi Kleen "BriefDescription": "FPU control word write stall cycles" 501*1f888acdSAndi Kleen }, 502*1f888acdSAndi Kleen { 503*1f888acdSAndi Kleen "EventCode": "0xA2", 504*1f888acdSAndi Kleen "Counter": "0,1,2,3", 505*1f888acdSAndi Kleen "UMask": "0x2", 506*1f888acdSAndi Kleen "EventName": "RESOURCE_STALLS.LOAD", 507*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 508*1f888acdSAndi Kleen "BriefDescription": "Load buffer stall cycles" 509*1f888acdSAndi Kleen }, 510*1f888acdSAndi Kleen { 511*1f888acdSAndi Kleen "EventCode": "0xA2", 512*1f888acdSAndi Kleen "Counter": "0,1,2,3", 513*1f888acdSAndi Kleen "UMask": "0x40", 514*1f888acdSAndi Kleen "EventName": "RESOURCE_STALLS.MXCSR", 515*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 516*1f888acdSAndi Kleen "BriefDescription": "MXCSR rename stall cycles" 517*1f888acdSAndi Kleen }, 518*1f888acdSAndi Kleen { 519*1f888acdSAndi Kleen "EventCode": "0xA2", 520*1f888acdSAndi Kleen "Counter": "0,1,2,3", 521*1f888acdSAndi Kleen "UMask": "0x80", 522*1f888acdSAndi Kleen "EventName": "RESOURCE_STALLS.OTHER", 523*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 524*1f888acdSAndi Kleen "BriefDescription": "Other Resource related stall cycles" 525*1f888acdSAndi Kleen }, 526*1f888acdSAndi Kleen { 527*1f888acdSAndi Kleen "EventCode": "0xA2", 528*1f888acdSAndi Kleen "Counter": "0,1,2,3", 529*1f888acdSAndi Kleen "UMask": "0x10", 530*1f888acdSAndi Kleen "EventName": "RESOURCE_STALLS.ROB_FULL", 531*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 532*1f888acdSAndi Kleen "BriefDescription": "ROB full stall cycles" 533*1f888acdSAndi Kleen }, 534*1f888acdSAndi Kleen { 535*1f888acdSAndi Kleen "EventCode": "0xA2", 536*1f888acdSAndi Kleen "Counter": "0,1,2,3", 537*1f888acdSAndi Kleen "UMask": "0x4", 538*1f888acdSAndi Kleen "EventName": "RESOURCE_STALLS.RS_FULL", 539*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 540*1f888acdSAndi Kleen "BriefDescription": "Reservation Station full stall cycles" 541*1f888acdSAndi Kleen }, 542*1f888acdSAndi Kleen { 543*1f888acdSAndi Kleen "EventCode": "0xA2", 544*1f888acdSAndi Kleen "Counter": "0,1,2,3", 545*1f888acdSAndi Kleen "UMask": "0x8", 546*1f888acdSAndi Kleen "EventName": "RESOURCE_STALLS.STORE", 547*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 548*1f888acdSAndi Kleen "BriefDescription": "Store buffer stall cycles" 549*1f888acdSAndi Kleen }, 550*1f888acdSAndi Kleen { 551*1f888acdSAndi Kleen "PEBS": "1", 552*1f888acdSAndi Kleen "EventCode": "0xC7", 553*1f888acdSAndi Kleen "Counter": "0,1,2,3", 554*1f888acdSAndi Kleen "UMask": "0x4", 555*1f888acdSAndi Kleen "EventName": "SSEX_UOPS_RETIRED.PACKED_DOUBLE", 556*1f888acdSAndi Kleen "SampleAfterValue": "200000", 557*1f888acdSAndi Kleen "BriefDescription": "SIMD Packed-Double Uops retired (Precise Event)" 558*1f888acdSAndi Kleen }, 559*1f888acdSAndi Kleen { 560*1f888acdSAndi Kleen "PEBS": "1", 561*1f888acdSAndi Kleen "EventCode": "0xC7", 562*1f888acdSAndi Kleen "Counter": "0,1,2,3", 563*1f888acdSAndi Kleen "UMask": "0x1", 564*1f888acdSAndi Kleen "EventName": "SSEX_UOPS_RETIRED.PACKED_SINGLE", 565*1f888acdSAndi Kleen "SampleAfterValue": "200000", 566*1f888acdSAndi Kleen "BriefDescription": "SIMD Packed-Single Uops retired (Precise Event)" 567*1f888acdSAndi Kleen }, 568*1f888acdSAndi Kleen { 569*1f888acdSAndi Kleen "PEBS": "1", 570*1f888acdSAndi Kleen "EventCode": "0xC7", 571*1f888acdSAndi Kleen "Counter": "0,1,2,3", 572*1f888acdSAndi Kleen "UMask": "0x8", 573*1f888acdSAndi Kleen "EventName": "SSEX_UOPS_RETIRED.SCALAR_DOUBLE", 574*1f888acdSAndi Kleen "SampleAfterValue": "200000", 575*1f888acdSAndi Kleen "BriefDescription": "SIMD Scalar-Double Uops retired (Precise Event)" 576*1f888acdSAndi Kleen }, 577*1f888acdSAndi Kleen { 578*1f888acdSAndi Kleen "PEBS": "1", 579*1f888acdSAndi Kleen "EventCode": "0xC7", 580*1f888acdSAndi Kleen "Counter": "0,1,2,3", 581*1f888acdSAndi Kleen "UMask": "0x2", 582*1f888acdSAndi Kleen "EventName": "SSEX_UOPS_RETIRED.SCALAR_SINGLE", 583*1f888acdSAndi Kleen "SampleAfterValue": "200000", 584*1f888acdSAndi Kleen "BriefDescription": "SIMD Scalar-Single Uops retired (Precise Event)" 585*1f888acdSAndi Kleen }, 586*1f888acdSAndi Kleen { 587*1f888acdSAndi Kleen "PEBS": "1", 588*1f888acdSAndi Kleen "EventCode": "0xC7", 589*1f888acdSAndi Kleen "Counter": "0,1,2,3", 590*1f888acdSAndi Kleen "UMask": "0x10", 591*1f888acdSAndi Kleen "EventName": "SSEX_UOPS_RETIRED.VECTOR_INTEGER", 592*1f888acdSAndi Kleen "SampleAfterValue": "200000", 593*1f888acdSAndi Kleen "BriefDescription": "SIMD Vector Integer Uops retired (Precise Event)" 594*1f888acdSAndi Kleen }, 595*1f888acdSAndi Kleen { 596*1f888acdSAndi Kleen "EventCode": "0xDB", 597*1f888acdSAndi Kleen "Counter": "0,1,2,3", 598*1f888acdSAndi Kleen "UMask": "0x1", 599*1f888acdSAndi Kleen "EventName": "UOP_UNFUSION", 600*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 601*1f888acdSAndi Kleen "BriefDescription": "Uop unfusions due to FP exceptions" 602*1f888acdSAndi Kleen }, 603*1f888acdSAndi Kleen { 604*1f888acdSAndi Kleen "EventCode": "0xD1", 605*1f888acdSAndi Kleen "Counter": "0,1,2,3", 606*1f888acdSAndi Kleen "UMask": "0x4", 607*1f888acdSAndi Kleen "EventName": "UOPS_DECODED.ESP_FOLDING", 608*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 609*1f888acdSAndi Kleen "BriefDescription": "Stack pointer instructions decoded" 610*1f888acdSAndi Kleen }, 611*1f888acdSAndi Kleen { 612*1f888acdSAndi Kleen "EventCode": "0xD1", 613*1f888acdSAndi Kleen "Counter": "0,1,2,3", 614*1f888acdSAndi Kleen "UMask": "0x8", 615*1f888acdSAndi Kleen "EventName": "UOPS_DECODED.ESP_SYNC", 616*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 617*1f888acdSAndi Kleen "BriefDescription": "Stack pointer sync operations" 618*1f888acdSAndi Kleen }, 619*1f888acdSAndi Kleen { 620*1f888acdSAndi Kleen "EventCode": "0xD1", 621*1f888acdSAndi Kleen "Counter": "0,1,2,3", 622*1f888acdSAndi Kleen "UMask": "0x2", 623*1f888acdSAndi Kleen "EventName": "UOPS_DECODED.MS_CYCLES_ACTIVE", 624*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 625*1f888acdSAndi Kleen "BriefDescription": "Uops decoded by Microcode Sequencer", 626*1f888acdSAndi Kleen "CounterMask": "1" 627*1f888acdSAndi Kleen }, 628*1f888acdSAndi Kleen { 629*1f888acdSAndi Kleen "EventCode": "0xD1", 630*1f888acdSAndi Kleen "Invert": "1", 631*1f888acdSAndi Kleen "Counter": "0,1,2,3", 632*1f888acdSAndi Kleen "UMask": "0x1", 633*1f888acdSAndi Kleen "EventName": "UOPS_DECODED.STALL_CYCLES", 634*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 635*1f888acdSAndi Kleen "BriefDescription": "Cycles no Uops are decoded", 636*1f888acdSAndi Kleen "CounterMask": "1" 637*1f888acdSAndi Kleen }, 638*1f888acdSAndi Kleen { 639*1f888acdSAndi Kleen "EventCode": "0xB1", 640*1f888acdSAndi Kleen "Counter": "0,1,2,3", 641*1f888acdSAndi Kleen "UMask": "0x3f", 642*1f888acdSAndi Kleen "AnyThread": "1", 643*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.CORE_ACTIVE_CYCLES", 644*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 645*1f888acdSAndi Kleen "BriefDescription": "Cycles Uops executed on any port (core count)", 646*1f888acdSAndi Kleen "CounterMask": "1" 647*1f888acdSAndi Kleen }, 648*1f888acdSAndi Kleen { 649*1f888acdSAndi Kleen "EventCode": "0xB1", 650*1f888acdSAndi Kleen "Counter": "0,1,2,3", 651*1f888acdSAndi Kleen "UMask": "0x1f", 652*1f888acdSAndi Kleen "AnyThread": "1", 653*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.CORE_ACTIVE_CYCLES_NO_PORT5", 654*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 655*1f888acdSAndi Kleen "BriefDescription": "Cycles Uops executed on ports 0-4 (core count)", 656*1f888acdSAndi Kleen "CounterMask": "1" 657*1f888acdSAndi Kleen }, 658*1f888acdSAndi Kleen { 659*1f888acdSAndi Kleen "EventCode": "0xB1", 660*1f888acdSAndi Kleen "Invert": "1", 661*1f888acdSAndi Kleen "Counter": "0,1,2,3", 662*1f888acdSAndi Kleen "UMask": "0x3f", 663*1f888acdSAndi Kleen "AnyThread": "1", 664*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.CORE_STALL_COUNT", 665*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 666*1f888acdSAndi Kleen "BriefDescription": "Uops executed on any port (core count)", 667*1f888acdSAndi Kleen "CounterMask": "1", 668*1f888acdSAndi Kleen "EdgeDetect": "1" 669*1f888acdSAndi Kleen }, 670*1f888acdSAndi Kleen { 671*1f888acdSAndi Kleen "EventCode": "0xB1", 672*1f888acdSAndi Kleen "Invert": "1", 673*1f888acdSAndi Kleen "Counter": "0,1,2,3", 674*1f888acdSAndi Kleen "UMask": "0x1f", 675*1f888acdSAndi Kleen "AnyThread": "1", 676*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.CORE_STALL_COUNT_NO_PORT5", 677*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 678*1f888acdSAndi Kleen "BriefDescription": "Uops executed on ports 0-4 (core count)", 679*1f888acdSAndi Kleen "CounterMask": "1", 680*1f888acdSAndi Kleen "EdgeDetect": "1" 681*1f888acdSAndi Kleen }, 682*1f888acdSAndi Kleen { 683*1f888acdSAndi Kleen "EventCode": "0xB1", 684*1f888acdSAndi Kleen "Invert": "1", 685*1f888acdSAndi Kleen "Counter": "0,1,2,3", 686*1f888acdSAndi Kleen "UMask": "0x3f", 687*1f888acdSAndi Kleen "AnyThread": "1", 688*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.CORE_STALL_CYCLES", 689*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 690*1f888acdSAndi Kleen "BriefDescription": "Cycles no Uops issued on any port (core count)", 691*1f888acdSAndi Kleen "CounterMask": "1" 692*1f888acdSAndi Kleen }, 693*1f888acdSAndi Kleen { 694*1f888acdSAndi Kleen "EventCode": "0xB1", 695*1f888acdSAndi Kleen "Invert": "1", 696*1f888acdSAndi Kleen "Counter": "0,1,2,3", 697*1f888acdSAndi Kleen "UMask": "0x1f", 698*1f888acdSAndi Kleen "AnyThread": "1", 699*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.CORE_STALL_CYCLES_NO_PORT5", 700*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 701*1f888acdSAndi Kleen "BriefDescription": "Cycles no Uops issued on ports 0-4 (core count)", 702*1f888acdSAndi Kleen "CounterMask": "1" 703*1f888acdSAndi Kleen }, 704*1f888acdSAndi Kleen { 705*1f888acdSAndi Kleen "EventCode": "0xB1", 706*1f888acdSAndi Kleen "Counter": "0,1,2,3", 707*1f888acdSAndi Kleen "UMask": "0x1", 708*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.PORT0", 709*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 710*1f888acdSAndi Kleen "BriefDescription": "Uops executed on port 0" 711*1f888acdSAndi Kleen }, 712*1f888acdSAndi Kleen { 713*1f888acdSAndi Kleen "EventCode": "0xB1", 714*1f888acdSAndi Kleen "Counter": "0,1,2,3", 715*1f888acdSAndi Kleen "UMask": "0x40", 716*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.PORT015", 717*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 718*1f888acdSAndi Kleen "BriefDescription": "Uops issued on ports 0, 1 or 5" 719*1f888acdSAndi Kleen }, 720*1f888acdSAndi Kleen { 721*1f888acdSAndi Kleen "EventCode": "0xB1", 722*1f888acdSAndi Kleen "Invert": "1", 723*1f888acdSAndi Kleen "Counter": "0,1,2,3", 724*1f888acdSAndi Kleen "UMask": "0x40", 725*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.PORT015_STALL_CYCLES", 726*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 727*1f888acdSAndi Kleen "BriefDescription": "Cycles no Uops issued on ports 0, 1 or 5", 728*1f888acdSAndi Kleen "CounterMask": "1" 729*1f888acdSAndi Kleen }, 730*1f888acdSAndi Kleen { 731*1f888acdSAndi Kleen "EventCode": "0xB1", 732*1f888acdSAndi Kleen "Counter": "0,1,2,3", 733*1f888acdSAndi Kleen "UMask": "0x2", 734*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.PORT1", 735*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 736*1f888acdSAndi Kleen "BriefDescription": "Uops executed on port 1" 737*1f888acdSAndi Kleen }, 738*1f888acdSAndi Kleen { 739*1f888acdSAndi Kleen "EventCode": "0xB1", 740*1f888acdSAndi Kleen "Counter": "0,1,2,3", 741*1f888acdSAndi Kleen "UMask": "0x4", 742*1f888acdSAndi Kleen "AnyThread": "1", 743*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.PORT2_CORE", 744*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 745*1f888acdSAndi Kleen "BriefDescription": "Uops executed on port 2 (core count)" 746*1f888acdSAndi Kleen }, 747*1f888acdSAndi Kleen { 748*1f888acdSAndi Kleen "EventCode": "0xB1", 749*1f888acdSAndi Kleen "Counter": "0,1,2,3", 750*1f888acdSAndi Kleen "UMask": "0x80", 751*1f888acdSAndi Kleen "AnyThread": "1", 752*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.PORT234_CORE", 753*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 754*1f888acdSAndi Kleen "BriefDescription": "Uops issued on ports 2, 3 or 4" 755*1f888acdSAndi Kleen }, 756*1f888acdSAndi Kleen { 757*1f888acdSAndi Kleen "EventCode": "0xB1", 758*1f888acdSAndi Kleen "Counter": "0,1,2,3", 759*1f888acdSAndi Kleen "UMask": "0x8", 760*1f888acdSAndi Kleen "AnyThread": "1", 761*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.PORT3_CORE", 762*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 763*1f888acdSAndi Kleen "BriefDescription": "Uops executed on port 3 (core count)" 764*1f888acdSAndi Kleen }, 765*1f888acdSAndi Kleen { 766*1f888acdSAndi Kleen "EventCode": "0xB1", 767*1f888acdSAndi Kleen "Counter": "0,1,2,3", 768*1f888acdSAndi Kleen "UMask": "0x10", 769*1f888acdSAndi Kleen "AnyThread": "1", 770*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.PORT4_CORE", 771*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 772*1f888acdSAndi Kleen "BriefDescription": "Uops executed on port 4 (core count)" 773*1f888acdSAndi Kleen }, 774*1f888acdSAndi Kleen { 775*1f888acdSAndi Kleen "EventCode": "0xB1", 776*1f888acdSAndi Kleen "Counter": "0,1,2,3", 777*1f888acdSAndi Kleen "UMask": "0x20", 778*1f888acdSAndi Kleen "EventName": "UOPS_EXECUTED.PORT5", 779*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 780*1f888acdSAndi Kleen "BriefDescription": "Uops executed on port 5" 781*1f888acdSAndi Kleen }, 782*1f888acdSAndi Kleen { 783*1f888acdSAndi Kleen "EventCode": "0xE", 784*1f888acdSAndi Kleen "Counter": "0,1,2,3", 785*1f888acdSAndi Kleen "UMask": "0x1", 786*1f888acdSAndi Kleen "EventName": "UOPS_ISSUED.ANY", 787*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 788*1f888acdSAndi Kleen "BriefDescription": "Uops issued" 789*1f888acdSAndi Kleen }, 790*1f888acdSAndi Kleen { 791*1f888acdSAndi Kleen "EventCode": "0xE", 792*1f888acdSAndi Kleen "Invert": "1", 793*1f888acdSAndi Kleen "Counter": "0,1,2,3", 794*1f888acdSAndi Kleen "UMask": "0x1", 795*1f888acdSAndi Kleen "AnyThread": "1", 796*1f888acdSAndi Kleen "EventName": "UOPS_ISSUED.CORE_STALL_CYCLES", 797*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 798*1f888acdSAndi Kleen "BriefDescription": "Cycles no Uops were issued on any thread", 799*1f888acdSAndi Kleen "CounterMask": "1" 800*1f888acdSAndi Kleen }, 801*1f888acdSAndi Kleen { 802*1f888acdSAndi Kleen "EventCode": "0xE", 803*1f888acdSAndi Kleen "Counter": "0,1,2,3", 804*1f888acdSAndi Kleen "UMask": "0x1", 805*1f888acdSAndi Kleen "AnyThread": "1", 806*1f888acdSAndi Kleen "EventName": "UOPS_ISSUED.CYCLES_ALL_THREADS", 807*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 808*1f888acdSAndi Kleen "BriefDescription": "Cycles Uops were issued on either thread", 809*1f888acdSAndi Kleen "CounterMask": "1" 810*1f888acdSAndi Kleen }, 811*1f888acdSAndi Kleen { 812*1f888acdSAndi Kleen "EventCode": "0xE", 813*1f888acdSAndi Kleen "Counter": "0,1,2,3", 814*1f888acdSAndi Kleen "UMask": "0x2", 815*1f888acdSAndi Kleen "EventName": "UOPS_ISSUED.FUSED", 816*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 817*1f888acdSAndi Kleen "BriefDescription": "Fused Uops issued" 818*1f888acdSAndi Kleen }, 819*1f888acdSAndi Kleen { 820*1f888acdSAndi Kleen "EventCode": "0xE", 821*1f888acdSAndi Kleen "Invert": "1", 822*1f888acdSAndi Kleen "Counter": "0,1,2,3", 823*1f888acdSAndi Kleen "UMask": "0x1", 824*1f888acdSAndi Kleen "EventName": "UOPS_ISSUED.STALL_CYCLES", 825*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 826*1f888acdSAndi Kleen "BriefDescription": "Cycles no Uops were issued", 827*1f888acdSAndi Kleen "CounterMask": "1" 828*1f888acdSAndi Kleen }, 829*1f888acdSAndi Kleen { 830*1f888acdSAndi Kleen "PEBS": "1", 831*1f888acdSAndi Kleen "EventCode": "0xC2", 832*1f888acdSAndi Kleen "Counter": "0,1,2,3", 833*1f888acdSAndi Kleen "UMask": "0x1", 834*1f888acdSAndi Kleen "EventName": "UOPS_RETIRED.ACTIVE_CYCLES", 835*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 836*1f888acdSAndi Kleen "BriefDescription": "Cycles Uops are being retired", 837*1f888acdSAndi Kleen "CounterMask": "1" 838*1f888acdSAndi Kleen }, 839*1f888acdSAndi Kleen { 840*1f888acdSAndi Kleen "PEBS": "1", 841*1f888acdSAndi Kleen "EventCode": "0xC2", 842*1f888acdSAndi Kleen "Counter": "0,1,2,3", 843*1f888acdSAndi Kleen "UMask": "0x1", 844*1f888acdSAndi Kleen "EventName": "UOPS_RETIRED.ANY", 845*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 846*1f888acdSAndi Kleen "BriefDescription": "Uops retired (Precise Event)" 847*1f888acdSAndi Kleen }, 848*1f888acdSAndi Kleen { 849*1f888acdSAndi Kleen "PEBS": "1", 850*1f888acdSAndi Kleen "EventCode": "0xC2", 851*1f888acdSAndi Kleen "Counter": "0,1,2,3", 852*1f888acdSAndi Kleen "UMask": "0x4", 853*1f888acdSAndi Kleen "EventName": "UOPS_RETIRED.MACRO_FUSED", 854*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 855*1f888acdSAndi Kleen "BriefDescription": "Macro-fused Uops retired (Precise Event)" 856*1f888acdSAndi Kleen }, 857*1f888acdSAndi Kleen { 858*1f888acdSAndi Kleen "PEBS": "1", 859*1f888acdSAndi Kleen "EventCode": "0xC2", 860*1f888acdSAndi Kleen "Counter": "0,1,2,3", 861*1f888acdSAndi Kleen "UMask": "0x2", 862*1f888acdSAndi Kleen "EventName": "UOPS_RETIRED.RETIRE_SLOTS", 863*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 864*1f888acdSAndi Kleen "BriefDescription": "Retirement slots used (Precise Event)" 865*1f888acdSAndi Kleen }, 866*1f888acdSAndi Kleen { 867*1f888acdSAndi Kleen "PEBS": "1", 868*1f888acdSAndi Kleen "EventCode": "0xC2", 869*1f888acdSAndi Kleen "Invert": "1", 870*1f888acdSAndi Kleen "Counter": "0,1,2,3", 871*1f888acdSAndi Kleen "UMask": "0x1", 872*1f888acdSAndi Kleen "EventName": "UOPS_RETIRED.STALL_CYCLES", 873*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 874*1f888acdSAndi Kleen "BriefDescription": "Cycles Uops are not retiring (Precise Event)", 875*1f888acdSAndi Kleen "CounterMask": "1" 876*1f888acdSAndi Kleen }, 877*1f888acdSAndi Kleen { 878*1f888acdSAndi Kleen "PEBS": "1", 879*1f888acdSAndi Kleen "EventCode": "0xC2", 880*1f888acdSAndi Kleen "Invert": "1", 881*1f888acdSAndi Kleen "Counter": "0,1,2,3", 882*1f888acdSAndi Kleen "UMask": "0x1", 883*1f888acdSAndi Kleen "EventName": "UOPS_RETIRED.TOTAL_CYCLES", 884*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 885*1f888acdSAndi Kleen "BriefDescription": "Total cycles using precise uop retired event (Precise Event)", 886*1f888acdSAndi Kleen "CounterMask": "16" 887*1f888acdSAndi Kleen }, 888*1f888acdSAndi Kleen { 889*1f888acdSAndi Kleen "PEBS": "2", 890*1f888acdSAndi Kleen "EventCode": "0xC0", 891*1f888acdSAndi Kleen "Invert": "1", 892*1f888acdSAndi Kleen "Counter": "0,1,2,3", 893*1f888acdSAndi Kleen "UMask": "0x1", 894*1f888acdSAndi Kleen "EventName": "INST_RETIRED.TOTAL_CYCLES_PS", 895*1f888acdSAndi Kleen "SampleAfterValue": "2000000", 896*1f888acdSAndi Kleen "BriefDescription": "Total cycles (Precise Event)", 897*1f888acdSAndi Kleen "CounterMask": "16" 898*1f888acdSAndi Kleen } 899*1f888acdSAndi Kleen]