xref: /linux/tools/perf/pmu-events/arch/x86/silvermont/other.json (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1[
2    {
3        "BriefDescription": "Cycles code-fetch stalled due to any reason.",
4        "Counter": "0,1",
5        "EventCode": "0x86",
6        "EventName": "FETCH_STALL.ALL",
7        "PublicDescription": "Counts cycles that fetch is stalled due to any reason. That is, the decoder queue is able to accept bytes, but the fetch unit is unable to provide bytes.  This will include cycles due to an ITLB miss, ICache miss and other events.",
8        "SampleAfterValue": "200003",
9        "UMask": "0x3f"
10    },
11    {
12        "BriefDescription": "Cycles code-fetch stalled due to an outstanding ITLB miss.",
13        "Counter": "0,1",
14        "EventCode": "0x86",
15        "EventName": "FETCH_STALL.ITLB_FILL_PENDING_CYCLES",
16        "PublicDescription": "Counts cycles that fetch is stalled due to an outstanding ITLB miss. That is, the decoder queue is able to accept bytes, but the fetch unit is unable to provide bytes due to an ITLB miss.  Note: this event is not the same as page walk cycles to retrieve an instruction translation.",
17        "SampleAfterValue": "200003",
18        "UMask": "0x2"
19    }
20]
21