xref: /linux/tools/perf/pmu-events/arch/x86/nehalemep/virtual-memory.json (revision c79c3c34f75d72a066e292b10aa50fc758c97c89) 
1[
2    {
3        "EventCode": "0x8",
4        "Counter": "0,1,2,3",
5        "UMask": "0x1",
6        "EventName": "DTLB_LOAD_MISSES.ANY",
7        "SampleAfterValue": "200000",
8        "BriefDescription": "DTLB load misses"
9    },
10    {
11        "EventCode": "0x8",
12        "Counter": "0,1,2,3",
13        "UMask": "0x20",
14        "EventName": "DTLB_LOAD_MISSES.PDE_MISS",
15        "SampleAfterValue": "200000",
16        "BriefDescription": "DTLB load miss caused by low part of address"
17    },
18    {
19        "EventCode": "0x8",
20        "Counter": "0,1,2,3",
21        "UMask": "0x10",
22        "EventName": "DTLB_LOAD_MISSES.STLB_HIT",
23        "SampleAfterValue": "2000000",
24        "BriefDescription": "DTLB second level hit"
25    },
26    {
27        "EventCode": "0x8",
28        "Counter": "0,1,2,3",
29        "UMask": "0x2",
30        "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
31        "SampleAfterValue": "200000",
32        "BriefDescription": "DTLB load miss page walks complete"
33    },
34    {
35        "EventCode": "0x49",
36        "Counter": "0,1,2,3",
37        "UMask": "0x1",
38        "EventName": "DTLB_MISSES.ANY",
39        "SampleAfterValue": "200000",
40        "BriefDescription": "DTLB misses"
41    },
42    {
43        "EventCode": "0x49",
44        "Counter": "0,1,2,3",
45        "UMask": "0x10",
46        "EventName": "DTLB_MISSES.STLB_HIT",
47        "SampleAfterValue": "200000",
48        "BriefDescription": "DTLB first level misses but second level hit"
49    },
50    {
51        "EventCode": "0x49",
52        "Counter": "0,1,2,3",
53        "UMask": "0x2",
54        "EventName": "DTLB_MISSES.WALK_COMPLETED",
55        "SampleAfterValue": "200000",
56        "BriefDescription": "DTLB miss page walks"
57    },
58    {
59        "EventCode": "0xAE",
60        "Counter": "0,1,2,3",
61        "UMask": "0x1",
62        "EventName": "ITLB_FLUSH",
63        "SampleAfterValue": "2000000",
64        "BriefDescription": "ITLB flushes"
65    },
66    {
67        "PEBS": "1",
68        "EventCode": "0xC8",
69        "Counter": "0,1,2,3",
70        "UMask": "0x20",
71        "EventName": "ITLB_MISS_RETIRED",
72        "SampleAfterValue": "200000",
73        "BriefDescription": "Retired instructions that missed the ITLB (Precise Event)"
74    },
75    {
76        "EventCode": "0x85",
77        "Counter": "0,1,2,3",
78        "UMask": "0x1",
79        "EventName": "ITLB_MISSES.ANY",
80        "SampleAfterValue": "200000",
81        "BriefDescription": "ITLB miss"
82    },
83    {
84        "EventCode": "0x85",
85        "Counter": "0,1,2,3",
86        "UMask": "0x2",
87        "EventName": "ITLB_MISSES.WALK_COMPLETED",
88        "SampleAfterValue": "200000",
89        "BriefDescription": "ITLB miss page walks"
90    },
91    {
92        "PEBS": "1",
93        "EventCode": "0xCB",
94        "Counter": "0,1,2,3",
95        "UMask": "0x80",
96        "EventName": "MEM_LOAD_RETIRED.DTLB_MISS",
97        "SampleAfterValue": "200000",
98        "BriefDescription": "Retired loads that miss the DTLB (Precise Event)"
99    },
100    {
101        "PEBS": "1",
102        "EventCode": "0xC",
103        "Counter": "0,1,2,3",
104        "UMask": "0x1",
105        "EventName": "MEM_STORE_RETIRED.DTLB_MISS",
106        "SampleAfterValue": "200000",
107        "BriefDescription": "Retired stores that miss the DTLB (Precise Event)"
108    }
109]