xref: /linux/tools/perf/pmu-events/arch/x86/nehalemep/virtual-memory.json (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800) 
1edaa78b4SAndi Kleen[
2edaa78b4SAndi Kleen    {
344a9189fSIan Rogers        "BriefDescription": "DTLB load misses",
4*af557589SIan Rogers        "Counter": "0,1,2,3",
544a9189fSIan Rogers        "EventCode": "0x8",
6edaa78b4SAndi Kleen        "EventName": "DTLB_LOAD_MISSES.ANY",
7edaa78b4SAndi Kleen        "SampleAfterValue": "200000",
844a9189fSIan Rogers        "UMask": "0x1"
9edaa78b4SAndi Kleen    },
10edaa78b4SAndi Kleen    {
1144a9189fSIan Rogers        "BriefDescription": "DTLB load miss caused by low part of address",
12*af557589SIan Rogers        "Counter": "0,1,2,3",
1344a9189fSIan Rogers        "EventCode": "0x8",
14edaa78b4SAndi Kleen        "EventName": "DTLB_LOAD_MISSES.PDE_MISS",
15edaa78b4SAndi Kleen        "SampleAfterValue": "200000",
1644a9189fSIan Rogers        "UMask": "0x20"
17edaa78b4SAndi Kleen    },
18edaa78b4SAndi Kleen    {
1944a9189fSIan Rogers        "BriefDescription": "DTLB second level hit",
20*af557589SIan Rogers        "Counter": "0,1,2,3",
2144a9189fSIan Rogers        "EventCode": "0x8",
22edaa78b4SAndi Kleen        "EventName": "DTLB_LOAD_MISSES.STLB_HIT",
23edaa78b4SAndi Kleen        "SampleAfterValue": "2000000",
2444a9189fSIan Rogers        "UMask": "0x10"
25edaa78b4SAndi Kleen    },
26edaa78b4SAndi Kleen    {
2744a9189fSIan Rogers        "BriefDescription": "DTLB load miss page walks complete",
28*af557589SIan Rogers        "Counter": "0,1,2,3",
2944a9189fSIan Rogers        "EventCode": "0x8",
30edaa78b4SAndi Kleen        "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
31edaa78b4SAndi Kleen        "SampleAfterValue": "200000",
3244a9189fSIan Rogers        "UMask": "0x2"
33edaa78b4SAndi Kleen    },
34edaa78b4SAndi Kleen    {
3544a9189fSIan Rogers        "BriefDescription": "DTLB misses",
36*af557589SIan Rogers        "Counter": "0,1,2,3",
3744a9189fSIan Rogers        "EventCode": "0x49",
38edaa78b4SAndi Kleen        "EventName": "DTLB_MISSES.ANY",
39edaa78b4SAndi Kleen        "SampleAfterValue": "200000",
4044a9189fSIan Rogers        "UMask": "0x1"
41edaa78b4SAndi Kleen    },
42edaa78b4SAndi Kleen    {
4344a9189fSIan Rogers        "BriefDescription": "DTLB first level misses but second level hit",
44*af557589SIan Rogers        "Counter": "0,1,2,3",
4544a9189fSIan Rogers        "EventCode": "0x49",
46edaa78b4SAndi Kleen        "EventName": "DTLB_MISSES.STLB_HIT",
47edaa78b4SAndi Kleen        "SampleAfterValue": "200000",
4844a9189fSIan Rogers        "UMask": "0x10"
49edaa78b4SAndi Kleen    },
50edaa78b4SAndi Kleen    {
5144a9189fSIan Rogers        "BriefDescription": "DTLB miss page walks",
52*af557589SIan Rogers        "Counter": "0,1,2,3",
5344a9189fSIan Rogers        "EventCode": "0x49",
54edaa78b4SAndi Kleen        "EventName": "DTLB_MISSES.WALK_COMPLETED",
55edaa78b4SAndi Kleen        "SampleAfterValue": "200000",
5644a9189fSIan Rogers        "UMask": "0x2"
57edaa78b4SAndi Kleen    },
58edaa78b4SAndi Kleen    {
5944a9189fSIan Rogers        "BriefDescription": "ITLB flushes",
60*af557589SIan Rogers        "Counter": "0,1,2,3",
6144a9189fSIan Rogers        "EventCode": "0xAE",
62edaa78b4SAndi Kleen        "EventName": "ITLB_FLUSH",
63edaa78b4SAndi Kleen        "SampleAfterValue": "2000000",
6444a9189fSIan Rogers        "UMask": "0x1"
65edaa78b4SAndi Kleen    },
66edaa78b4SAndi Kleen    {
6744a9189fSIan Rogers        "BriefDescription": "ITLB miss",
68*af557589SIan Rogers        "Counter": "0,1,2,3",
69edaa78b4SAndi Kleen        "EventCode": "0x85",
70edaa78b4SAndi Kleen        "EventName": "ITLB_MISSES.ANY",
71edaa78b4SAndi Kleen        "SampleAfterValue": "200000",
7244a9189fSIan Rogers        "UMask": "0x1"
73edaa78b4SAndi Kleen    },
74edaa78b4SAndi Kleen    {
7544a9189fSIan Rogers        "BriefDescription": "ITLB miss page walks",
76*af557589SIan Rogers        "Counter": "0,1,2,3",
7744a9189fSIan Rogers        "EventCode": "0x85",
78edaa78b4SAndi Kleen        "EventName": "ITLB_MISSES.WALK_COMPLETED",
79edaa78b4SAndi Kleen        "SampleAfterValue": "200000",
8044a9189fSIan Rogers        "UMask": "0x2"
81edaa78b4SAndi Kleen    },
82edaa78b4SAndi Kleen    {
8344a9189fSIan Rogers        "BriefDescription": "Retired instructions that missed the ITLB (Precise Event)",
84*af557589SIan Rogers        "Counter": "0,1,2,3",
8544a9189fSIan Rogers        "EventCode": "0xC8",
8644a9189fSIan Rogers        "EventName": "ITLB_MISS_RETIRED",
87edaa78b4SAndi Kleen        "PEBS": "1",
8844a9189fSIan Rogers        "SampleAfterValue": "200000",
8944a9189fSIan Rogers        "UMask": "0x20"
9044a9189fSIan Rogers    },
9144a9189fSIan Rogers    {
9244a9189fSIan Rogers        "BriefDescription": "Retired loads that miss the DTLB (Precise Event)",
93*af557589SIan Rogers        "Counter": "0,1,2,3",
94edaa78b4SAndi Kleen        "EventCode": "0xCB",
95edaa78b4SAndi Kleen        "EventName": "MEM_LOAD_RETIRED.DTLB_MISS",
9644a9189fSIan Rogers        "PEBS": "1",
97edaa78b4SAndi Kleen        "SampleAfterValue": "200000",
9844a9189fSIan Rogers        "UMask": "0x80"
99edaa78b4SAndi Kleen    },
100edaa78b4SAndi Kleen    {
10144a9189fSIan Rogers        "BriefDescription": "Retired stores that miss the DTLB (Precise Event)",
102*af557589SIan Rogers        "Counter": "0,1,2,3",
10344a9189fSIan Rogers        "EventCode": "0xC",
104edaa78b4SAndi Kleen        "EventName": "MEM_STORE_RETIRED.DTLB_MISS",
10544a9189fSIan Rogers        "PEBS": "1",
106edaa78b4SAndi Kleen        "SampleAfterValue": "200000",
10744a9189fSIan Rogers        "UMask": "0x1"
108edaa78b4SAndi Kleen    }
109edaa78b4SAndi Kleen]
110