xref: /linux/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1[
2    {
3        "MetricExpr": "INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD",
4        "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
5        "MetricGroup": "Summary",
6        "MetricName": "IPC"
7    },
8    {
9        "MetricExpr": "UOPS_RETIRED.SLOTS / INST_RETIRED.ANY",
10        "BriefDescription": "Uops Per Instruction",
11        "MetricGroup": "Pipeline;Retire",
12        "MetricName": "UPI"
13    },
14    {
15        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN",
16        "BriefDescription": "Instruction per taken branch",
17        "MetricGroup": "Branches;FetchBW;PGO",
18        "MetricName": "IpTB"
19    },
20    {
21        "MetricExpr": "1 / (INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD)",
22        "BriefDescription": "Cycles Per Instruction (per Logical Processor)",
23        "MetricGroup": "Pipeline",
24        "MetricName": "CPI"
25    },
26    {
27        "MetricExpr": "CPU_CLK_UNHALTED.THREAD",
28        "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
29        "MetricGroup": "Pipeline",
30        "MetricName": "CLKS"
31    },
32    {
33        "MetricExpr": "INST_RETIRED.ANY / CPU_CLK_UNHALTED.DISTRIBUTED",
34        "BriefDescription": "Instructions Per Cycle (per physical core)",
35        "MetricGroup": "SMT;TmaL1",
36        "MetricName": "CoreIPC"
37    },
38    {
39        "MetricExpr": "( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / CPU_CLK_UNHALTED.DISTRIBUTED",
40        "BriefDescription": "Floating Point Operations Per Cycle",
41        "MetricGroup": "Flops",
42        "MetricName": "FLOPc"
43    },
44    {
45        "MetricExpr": "UOPS_EXECUTED.THREAD / ( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 )",
46        "BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is at least 1 uop executed)",
47        "MetricGroup": "Pipeline;PortsUtil",
48        "MetricName": "ILP"
49    },
50    {
51        "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES",
52        "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear)",
53        "MetricGroup": "BrMispredicts",
54        "MetricName": "IpMispredict"
55    },
56    {
57        "MetricExpr": "CPU_CLK_UNHALTED.DISTRIBUTED",
58        "BriefDescription": "Core actual clocks when any Logical Processor is active on the Physical Core",
59        "MetricGroup": "SMT",
60        "MetricName": "CORE_CLKS"
61    },
62    {
63        "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS",
64        "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)",
65        "MetricGroup": "InsType",
66        "MetricName": "IpLoad"
67    },
68    {
69        "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES",
70        "BriefDescription": "Instructions per Store (lower number means higher occurrence rate)",
71        "MetricGroup": "InsType",
72        "MetricName": "IpStore"
73    },
74    {
75        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES",
76        "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)",
77        "MetricGroup": "Branches;InsType",
78        "MetricName": "IpBranch"
79    },
80    {
81        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL",
82        "BriefDescription": "Instructions per (near) call (lower number means higher occurrence rate)",
83        "MetricGroup": "Branches",
84        "MetricName": "IpCall"
85    },
86    {
87        "MetricExpr": "BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN",
88        "BriefDescription": "Branch instructions per taken branch. ",
89        "MetricGroup": "Branches;PGO",
90        "MetricName": "BpTkBranch"
91    },
92    {
93        "MetricExpr": "INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )",
94        "BriefDescription": "Instructions per Floating Point (FP) Operation (lower number means higher occurrence rate)",
95        "MetricGroup": "Flops;FpArith;InsType",
96        "MetricName": "IpFLOP"
97    },
98    {
99        "MetricExpr": "INST_RETIRED.ANY",
100        "BriefDescription": "Total number of retired Instructions",
101        "MetricGroup": "Summary;TmaL1",
102        "MetricName": "Instructions"
103    },
104    {
105        "MetricExpr": "LSD.UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)",
106        "BriefDescription": "Fraction of Uops delivered by the LSD (Loop Stream Detector; aka Loop Cache)",
107        "MetricGroup": "LSD",
108        "MetricName": "LSD_Coverage"
109    },
110    {
111        "MetricExpr": "IDQ.DSB_UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)",
112        "BriefDescription": "Fraction of Uops delivered by the DSB (aka Decoded ICache; or Uop Cache)",
113        "MetricGroup": "DSB;FetchBW",
114        "MetricName": "DSB_Coverage"
115    },
116    {
117        "MetricExpr": "L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )",
118        "BriefDescription": "Actual Average Latency for L1 data-cache miss demand loads (in core cycles)",
119        "MetricGroup": "MemoryBound;MemoryLat",
120        "MetricName": "Load_Miss_Real_Latency"
121    },
122    {
123        "MetricExpr": "L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES",
124        "BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is at least one such miss. Per-Logical Processor)",
125        "MetricGroup": "MemoryBound;MemoryBW",
126        "MetricName": "MLP"
127    },
128    {
129        "MetricConstraint": "NO_NMI_WATCHDOG",
130        "MetricExpr": "( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING ) / ( 2 * CPU_CLK_UNHALTED.DISTRIBUTED )",
131        "BriefDescription": "Utilization of the core's Page Walker(s) serving STLB misses triggered by instruction/Load/Store accesses",
132        "MetricGroup": "MemoryTLB",
133        "MetricName": "Page_Walks_Utilization"
134    },
135    {
136        "MetricExpr": "64 * L1D.REPLACEMENT / 1000000000 / duration_time",
137        "BriefDescription": "Average data fill bandwidth to the L1 data cache [GB / sec]",
138        "MetricGroup": "MemoryBW",
139        "MetricName": "L1D_Cache_Fill_BW"
140    },
141    {
142        "MetricExpr": "64 * L2_LINES_IN.ALL / 1000000000 / duration_time",
143        "BriefDescription": "Average data fill bandwidth to the L2 cache [GB / sec]",
144        "MetricGroup": "MemoryBW",
145        "MetricName": "L2_Cache_Fill_BW"
146    },
147    {
148        "MetricExpr": "64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time",
149        "BriefDescription": "Average per-core data fill bandwidth to the L3 cache [GB / sec]",
150        "MetricGroup": "MemoryBW",
151        "MetricName": "L3_Cache_Fill_BW"
152    },
153    {
154        "MetricExpr": "64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time",
155        "BriefDescription": "Average per-core data access bandwidth to the L3 cache [GB / sec]",
156        "MetricGroup": "MemoryBW;Offcore",
157        "MetricName": "L3_Cache_Access_BW"
158    },
159    {
160        "MetricExpr": "1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY",
161        "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",
162        "MetricGroup": "CacheMisses",
163        "MetricName": "L1MPKI"
164    },
165    {
166        "MetricExpr": "1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY",
167        "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",
168        "MetricGroup": "CacheMisses",
169        "MetricName": "L2MPKI"
170    },
171    {
172        "MetricExpr": "1000 * ( ( OFFCORE_REQUESTS.ALL_DATA_RD - OFFCORE_REQUESTS.DEMAND_DATA_RD ) + L2_RQSTS.ALL_DEMAND_MISS + L2_RQSTS.SWPF_MISS ) / INST_RETIRED.ANY",
173        "BriefDescription": "L2 cache misses per kilo instruction for all request types (including speculative)",
174        "MetricGroup": "CacheMisses;Offcore",
175        "MetricName": "L2MPKI_All"
176    },
177    {
178        "MetricExpr": "1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY",
179        "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
180        "MetricGroup": "CacheMisses",
181        "MetricName": "L3MPKI"
182    },
183    {
184        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",
185        "BriefDescription": "Average CPU Utilization",
186        "MetricGroup": "HPC;Summary",
187        "MetricName": "CPU_Utilization"
188    },
189    {
190        "MetricExpr": "(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time",
191        "BriefDescription": "Measured Average Frequency for unhalted processors [GHz]",
192        "MetricGroup": "Summary;Power",
193        "MetricName": "Average_Frequency"
194    },
195    {
196        "MetricExpr": "( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time",
197        "BriefDescription": "Giga Floating Point Operations Per Second",
198        "MetricGroup": "Flops;HPC",
199        "MetricName": "GFLOPs"
200    },
201    {
202        "MetricExpr": "CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC",
203        "BriefDescription": "Average Frequency Utilization relative nominal frequency",
204        "MetricGroup": "Power",
205        "MetricName": "Turbo_Utilization"
206    },
207    {
208        "MetricExpr": "1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED",
209        "BriefDescription": "Fraction of cycles where both hardware Logical Processors were active",
210        "MetricGroup": "SMT",
211        "MetricName": "SMT_2T_Utilization"
212    },
213    {
214        "MetricExpr": "CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD",
215        "BriefDescription": "Fraction of cycles spent in the Operating System (OS) Kernel mode",
216        "MetricGroup": "OS",
217        "MetricName": "Kernel_Utilization"
218    },
219    {
220        "MetricExpr": "64 * ( arb@event\\=0x81\\,umask\\=0x1@ + arb@event\\=0x84\\,umask\\=0x1@ ) / 1000000 / duration_time / 1000",
221        "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]",
222        "MetricGroup": "HPC;MemoryBW;SoC",
223        "MetricName": "DRAM_BW_Use"
224    },
225    {
226        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u",
227        "BriefDescription": "Instructions per Far Branch ( Far Branches apply upon transition from application to operating system, handling interrupts, exceptions) [lower number means higher occurrence rate]",
228        "MetricGroup": "Branches;OS",
229        "MetricName": "IpFarBranch"
230    },
231    {
232        "MetricExpr": "(cstate_core@c3\\-residency@ / msr@tsc@) * 100",
233        "BriefDescription": "C3 residency percent per core",
234        "MetricGroup": "Power",
235        "MetricName": "C3_Core_Residency"
236    },
237    {
238        "MetricExpr": "(cstate_core@c6\\-residency@ / msr@tsc@) * 100",
239        "BriefDescription": "C6 residency percent per core",
240        "MetricGroup": "Power",
241        "MetricName": "C6_Core_Residency"
242    },
243    {
244        "MetricExpr": "(cstate_core@c7\\-residency@ / msr@tsc@) * 100",
245        "BriefDescription": "C7 residency percent per core",
246        "MetricGroup": "Power",
247        "MetricName": "C7_Core_Residency"
248    },
249    {
250        "MetricExpr": "(cstate_pkg@c2\\-residency@ / msr@tsc@) * 100",
251        "BriefDescription": "C2 residency percent per package",
252        "MetricGroup": "Power",
253        "MetricName": "C2_Pkg_Residency"
254    },
255    {
256        "MetricExpr": "(cstate_pkg@c3\\-residency@ / msr@tsc@) * 100",
257        "BriefDescription": "C3 residency percent per package",
258        "MetricGroup": "Power",
259        "MetricName": "C3_Pkg_Residency"
260    },
261    {
262        "MetricExpr": "(cstate_pkg@c6\\-residency@ / msr@tsc@) * 100",
263        "BriefDescription": "C6 residency percent per package",
264        "MetricGroup": "Power",
265        "MetricName": "C6_Pkg_Residency"
266    },
267    {
268        "MetricExpr": "(cstate_pkg@c7\\-residency@ / msr@tsc@) * 100",
269        "BriefDescription": "C7 residency percent per package",
270        "MetricGroup": "Power",
271        "MetricName": "C7_Pkg_Residency"
272    }
273]
274