1[ 2 { 3 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page sizes)", 4 "EventCode": "0x12", 5 "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED", 6 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 7 "SampleAfterValue": "100003", 8 "UMask": "0xe" 9 }, 10 { 11 "BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page sizes)", 12 "EventCode": "0x13", 13 "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED", 14 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 15 "SampleAfterValue": "100003", 16 "UMask": "0xe" 17 }, 18 { 19 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page sizes)", 20 "EventCode": "0x11", 21 "EventName": "ITLB_MISSES.WALK_COMPLETED", 22 "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.", 23 "SampleAfterValue": "100003", 24 "UMask": "0xe" 25 } 26] 27