xref: /linux/tools/perf/pmu-events/arch/x86/elkhartlake/frontend.json (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1aa1bd892SJin Yao[
2aa1bd892SJin Yao    {
33c9c3157SIan Rogers        "BriefDescription": "Counts the total number of BACLEARS due to all branch types including conditional and unconditional jumps, returns, and indirect branches.",
4*1e56e919SIan Rogers        "Counter": "0,1,2,3",
5aa1bd892SJin Yao        "EventCode": "0xe6",
6aa1bd892SJin Yao        "EventName": "BACLEARS.ANY",
7aa1bd892SJin Yao        "PublicDescription": "Counts the total number of BACLEARS, which occur when the Branch Target Buffer (BTB) prediction or lack thereof, was corrected by a later branch predictor in the frontend.  Includes BACLEARS due to all branch types including conditional and unconditional jumps, returns, and indirect branches.",
8aa1bd892SJin Yao        "SampleAfterValue": "200003",
9aa1bd892SJin Yao        "UMask": "0x1"
10aa1bd892SJin Yao    },
11aa1bd892SJin Yao    {
12aa1bd892SJin Yao        "BriefDescription": "Counts the number of BACLEARS due to a conditional jump.",
13*1e56e919SIan Rogers        "Counter": "0,1,2,3",
14aa1bd892SJin Yao        "EventCode": "0xe6",
15aa1bd892SJin Yao        "EventName": "BACLEARS.COND",
16aa1bd892SJin Yao        "SampleAfterValue": "200003",
17aa1bd892SJin Yao        "UMask": "0x10"
18aa1bd892SJin Yao    },
19aa1bd892SJin Yao    {
20aa1bd892SJin Yao        "BriefDescription": "Counts the number of BACLEARS due to an indirect branch.",
21*1e56e919SIan Rogers        "Counter": "0,1,2,3",
22aa1bd892SJin Yao        "EventCode": "0xe6",
23aa1bd892SJin Yao        "EventName": "BACLEARS.INDIRECT",
24aa1bd892SJin Yao        "SampleAfterValue": "200003",
25aa1bd892SJin Yao        "UMask": "0x2"
26aa1bd892SJin Yao    },
27aa1bd892SJin Yao    {
28aa1bd892SJin Yao        "BriefDescription": "Counts the number of BACLEARS due to a return branch.",
29*1e56e919SIan Rogers        "Counter": "0,1,2,3",
30aa1bd892SJin Yao        "EventCode": "0xe6",
31aa1bd892SJin Yao        "EventName": "BACLEARS.RETURN",
32aa1bd892SJin Yao        "SampleAfterValue": "200003",
33aa1bd892SJin Yao        "UMask": "0x8"
34aa1bd892SJin Yao    },
35aa1bd892SJin Yao    {
363c9c3157SIan Rogers        "BriefDescription": "Counts the number of BACLEARS due to a direct, unconditional jump.",
37*1e56e919SIan Rogers        "Counter": "0,1,2,3",
38aa1bd892SJin Yao        "EventCode": "0xe6",
39aa1bd892SJin Yao        "EventName": "BACLEARS.UNCOND",
40aa1bd892SJin Yao        "SampleAfterValue": "200003",
41aa1bd892SJin Yao        "UMask": "0x4"
42aa1bd892SJin Yao    },
43aa1bd892SJin Yao    {
44aa1bd892SJin Yao        "BriefDescription": "Counts the number of times a decode restriction reduces the decode throughput due to wrong instruction length prediction.",
45*1e56e919SIan Rogers        "Counter": "0,1,2,3",
46aa1bd892SJin Yao        "EventCode": "0xe9",
47aa1bd892SJin Yao        "EventName": "DECODE_RESTRICTION.PREDECODE_WRONG",
48aa1bd892SJin Yao        "SampleAfterValue": "200003",
49aa1bd892SJin Yao        "UMask": "0x1"
50aa1bd892SJin Yao    },
51aa1bd892SJin Yao    {
52aa1bd892SJin Yao        "BriefDescription": "Counts the number of requests to the instruction cache for one or more bytes of a cache line.",
53*1e56e919SIan Rogers        "Counter": "0,1,2,3",
54aa1bd892SJin Yao        "EventCode": "0x80",
55aa1bd892SJin Yao        "EventName": "ICACHE.ACCESSES",
56aa1bd892SJin Yao        "PublicDescription": "Counts the total number of requests to the instruction cache.  The event only counts new cache line accesses, so that multiple back to back fetches to the exact same cache line or byte chunk count as one.  Specifically, the event counts when accesses from sequential code crosses the cache line boundary, or when a branch target is moved to a new line or to a non-sequential byte chunk of the same line.",
57aa1bd892SJin Yao        "SampleAfterValue": "200003",
58aa1bd892SJin Yao        "UMask": "0x3"
59aa1bd892SJin Yao    },
60aa1bd892SJin Yao    {
613c9c3157SIan Rogers        "BriefDescription": "Counts the number of instruction cache hits.",
62*1e56e919SIan Rogers        "Counter": "0,1,2,3",
633c9c3157SIan Rogers        "EventCode": "0x80",
643c9c3157SIan Rogers        "EventName": "ICACHE.HIT",
653c9c3157SIan Rogers        "PublicDescription": "Counts the number of requests that hit in the instruction cache.  The event only counts new cache line accesses, so that multiple back to back fetches to the exact same cache line and byte chunk count as one.  Specifically, the event counts when accesses from sequential code crosses the cache line boundary, or when a branch target is moved to a new line or to a non-sequential byte chunk of the same line.",
663c9c3157SIan Rogers        "SampleAfterValue": "200003",
673c9c3157SIan Rogers        "UMask": "0x1"
683c9c3157SIan Rogers    },
693c9c3157SIan Rogers    {
70aa1bd892SJin Yao        "BriefDescription": "Counts the number of instruction cache misses.",
71*1e56e919SIan Rogers        "Counter": "0,1,2,3",
72aa1bd892SJin Yao        "EventCode": "0x80",
73aa1bd892SJin Yao        "EventName": "ICACHE.MISSES",
74aa1bd892SJin Yao        "PublicDescription": "Counts the number of missed requests to the instruction cache.  The event only counts new cache line accesses, so that multiple back to back fetches to the exact same cache line and byte chunk count as one.  Specifically, the event counts when accesses from sequential code crosses the cache line boundary, or when a branch target is moved to a new line or to a non-sequential byte chunk of the same line.",
75aa1bd892SJin Yao        "SampleAfterValue": "200003",
76aa1bd892SJin Yao        "UMask": "0x2"
77aa1bd892SJin Yao    }
78aa1bd892SJin Yao]
79