1[ 2 { 3 "BriefDescription": "Bogus branches", 4 "Counter": "0,1", 5 "EventCode": "0xE4", 6 "EventName": "BOGUS_BR", 7 "SampleAfterValue": "2000000", 8 "UMask": "0x1" 9 }, 10 { 11 "BriefDescription": "Branch instructions decoded", 12 "Counter": "0,1", 13 "EventCode": "0xE0", 14 "EventName": "BR_INST_DECODED", 15 "SampleAfterValue": "2000000", 16 "UMask": "0x1" 17 }, 18 { 19 "BriefDescription": "Retired branch instructions.", 20 "Counter": "0,1", 21 "EventCode": "0xC4", 22 "EventName": "BR_INST_RETIRED.ANY", 23 "SampleAfterValue": "2000000", 24 "UMask": "0x0" 25 }, 26 { 27 "BriefDescription": "Retired branch instructions.", 28 "Counter": "0,1", 29 "EventCode": "0xC4", 30 "EventName": "BR_INST_RETIRED.ANY1", 31 "SampleAfterValue": "2000000", 32 "UMask": "0xf" 33 }, 34 { 35 "BriefDescription": "Retired mispredicted branch instructions (precise event).", 36 "Counter": "0,1", 37 "EventCode": "0xC5", 38 "EventName": "BR_INST_RETIRED.MISPRED", 39 "PEBS": "1", 40 "SampleAfterValue": "200000", 41 "UMask": "0x0" 42 }, 43 { 44 "BriefDescription": "Retired branch instructions that were mispredicted not-taken.", 45 "Counter": "0,1", 46 "EventCode": "0xC4", 47 "EventName": "BR_INST_RETIRED.MISPRED_NOT_TAKEN", 48 "SampleAfterValue": "200000", 49 "UMask": "0x2" 50 }, 51 { 52 "BriefDescription": "Retired branch instructions that were mispredicted taken.", 53 "Counter": "0,1", 54 "EventCode": "0xC4", 55 "EventName": "BR_INST_RETIRED.MISPRED_TAKEN", 56 "SampleAfterValue": "200000", 57 "UMask": "0x8" 58 }, 59 { 60 "BriefDescription": "Retired branch instructions that were predicted not-taken.", 61 "Counter": "0,1", 62 "EventCode": "0xC4", 63 "EventName": "BR_INST_RETIRED.PRED_NOT_TAKEN", 64 "SampleAfterValue": "2000000", 65 "UMask": "0x1" 66 }, 67 { 68 "BriefDescription": "Retired branch instructions that were predicted taken.", 69 "Counter": "0,1", 70 "EventCode": "0xC4", 71 "EventName": "BR_INST_RETIRED.PRED_TAKEN", 72 "SampleAfterValue": "2000000", 73 "UMask": "0x4" 74 }, 75 { 76 "BriefDescription": "Retired taken branch instructions.", 77 "Counter": "0,1", 78 "EventCode": "0xC4", 79 "EventName": "BR_INST_RETIRED.TAKEN", 80 "SampleAfterValue": "2000000", 81 "UMask": "0xc" 82 }, 83 { 84 "BriefDescription": "All macro conditional branch instructions.", 85 "Counter": "0,1", 86 "EventCode": "0x88", 87 "EventName": "BR_INST_TYPE_RETIRED.COND", 88 "SampleAfterValue": "2000000", 89 "UMask": "0x1" 90 }, 91 { 92 "BriefDescription": "Only taken macro conditional branch instructions", 93 "Counter": "0,1", 94 "EventCode": "0x88", 95 "EventName": "BR_INST_TYPE_RETIRED.COND_TAKEN", 96 "SampleAfterValue": "2000000", 97 "UMask": "0x41" 98 }, 99 { 100 "BriefDescription": "All non-indirect calls", 101 "Counter": "0,1", 102 "EventCode": "0x88", 103 "EventName": "BR_INST_TYPE_RETIRED.DIR_CALL", 104 "SampleAfterValue": "2000000", 105 "UMask": "0x10" 106 }, 107 { 108 "BriefDescription": "All indirect branches that are not calls.", 109 "Counter": "0,1", 110 "EventCode": "0x88", 111 "EventName": "BR_INST_TYPE_RETIRED.IND", 112 "SampleAfterValue": "2000000", 113 "UMask": "0x4" 114 }, 115 { 116 "BriefDescription": "All indirect calls, including both register and memory indirect.", 117 "Counter": "0,1", 118 "EventCode": "0x88", 119 "EventName": "BR_INST_TYPE_RETIRED.IND_CALL", 120 "SampleAfterValue": "2000000", 121 "UMask": "0x20" 122 }, 123 { 124 "BriefDescription": "All indirect branches that have a return mnemonic", 125 "Counter": "0,1", 126 "EventCode": "0x88", 127 "EventName": "BR_INST_TYPE_RETIRED.RET", 128 "SampleAfterValue": "2000000", 129 "UMask": "0x8" 130 }, 131 { 132 "BriefDescription": "All macro unconditional branch instructions, excluding calls and indirects", 133 "Counter": "0,1", 134 "EventCode": "0x88", 135 "EventName": "BR_INST_TYPE_RETIRED.UNCOND", 136 "SampleAfterValue": "2000000", 137 "UMask": "0x2" 138 }, 139 { 140 "BriefDescription": "Mispredicted cond branch instructions retired", 141 "Counter": "0,1", 142 "EventCode": "0x89", 143 "EventName": "BR_MISSP_TYPE_RETIRED.COND", 144 "SampleAfterValue": "200000", 145 "UMask": "0x1" 146 }, 147 { 148 "BriefDescription": "Mispredicted and taken cond branch instructions retired", 149 "Counter": "0,1", 150 "EventCode": "0x89", 151 "EventName": "BR_MISSP_TYPE_RETIRED.COND_TAKEN", 152 "SampleAfterValue": "200000", 153 "UMask": "0x11" 154 }, 155 { 156 "BriefDescription": "Mispredicted ind branches that are not calls", 157 "Counter": "0,1", 158 "EventCode": "0x89", 159 "EventName": "BR_MISSP_TYPE_RETIRED.IND", 160 "SampleAfterValue": "200000", 161 "UMask": "0x2" 162 }, 163 { 164 "BriefDescription": "Mispredicted indirect calls, including both register and memory indirect.", 165 "Counter": "0,1", 166 "EventCode": "0x89", 167 "EventName": "BR_MISSP_TYPE_RETIRED.IND_CALL", 168 "SampleAfterValue": "200000", 169 "UMask": "0x8" 170 }, 171 { 172 "BriefDescription": "Mispredicted return branches", 173 "Counter": "0,1", 174 "EventCode": "0x89", 175 "EventName": "BR_MISSP_TYPE_RETIRED.RETURN", 176 "SampleAfterValue": "200000", 177 "UMask": "0x4" 178 }, 179 { 180 "BriefDescription": "Bus cycles when core is not halted", 181 "Counter": "0,1", 182 "EventCode": "0x3C", 183 "EventName": "CPU_CLK_UNHALTED.BUS", 184 "SampleAfterValue": "200000", 185 "UMask": "0x1" 186 }, 187 { 188 "BriefDescription": "Core cycles when core is not halted", 189 "Counter": "Fixed counter 2", 190 "EventCode": "0xA", 191 "EventName": "CPU_CLK_UNHALTED.CORE", 192 "SampleAfterValue": "2000000", 193 "UMask": "0x0" 194 }, 195 { 196 "BriefDescription": "Core cycles when core is not halted", 197 "Counter": "0,1", 198 "EventCode": "0x3C", 199 "EventName": "CPU_CLK_UNHALTED.CORE_P", 200 "SampleAfterValue": "2000000", 201 "UMask": "0x0" 202 }, 203 { 204 "BriefDescription": "Reference cycles when core is not halted.", 205 "Counter": "Fixed counter 3", 206 "EventCode": "0xA", 207 "EventName": "CPU_CLK_UNHALTED.REF", 208 "SampleAfterValue": "2000000", 209 "UMask": "0x0" 210 }, 211 { 212 "BriefDescription": "Cycles the divider is busy.", 213 "Counter": "0,1", 214 "EventCode": "0x14", 215 "EventName": "CYCLES_DIV_BUSY", 216 "SampleAfterValue": "2000000", 217 "UMask": "0x1" 218 }, 219 { 220 "BriefDescription": "Divide operations retired", 221 "Counter": "0,1", 222 "EventCode": "0x13", 223 "EventName": "DIV.AR", 224 "SampleAfterValue": "2000000", 225 "UMask": "0x81" 226 }, 227 { 228 "BriefDescription": "Divide operations executed.", 229 "Counter": "0,1", 230 "EventCode": "0x13", 231 "EventName": "DIV.S", 232 "SampleAfterValue": "2000000", 233 "UMask": "0x1" 234 }, 235 { 236 "BriefDescription": "Instructions retired.", 237 "Counter": "Fixed counter 1", 238 "EventCode": "0xA", 239 "EventName": "INST_RETIRED.ANY", 240 "SampleAfterValue": "2000000", 241 "UMask": "0x0" 242 }, 243 { 244 "BriefDescription": "Instructions retired (precise event).", 245 "Counter": "0,1", 246 "EventCode": "0xC0", 247 "EventName": "INST_RETIRED.ANY_P", 248 "PEBS": "2", 249 "SampleAfterValue": "2000000", 250 "UMask": "0x0" 251 }, 252 { 253 "BriefDescription": "Self-Modifying Code detected.", 254 "Counter": "0,1", 255 "EventCode": "0xC3", 256 "EventName": "MACHINE_CLEARS.SMC", 257 "SampleAfterValue": "200000", 258 "UMask": "0x1" 259 }, 260 { 261 "BriefDescription": "Multiply operations retired", 262 "Counter": "0,1", 263 "EventCode": "0x12", 264 "EventName": "MUL.AR", 265 "SampleAfterValue": "2000000", 266 "UMask": "0x81" 267 }, 268 { 269 "BriefDescription": "Multiply operations executed.", 270 "Counter": "0,1", 271 "EventCode": "0x12", 272 "EventName": "MUL.S", 273 "SampleAfterValue": "2000000", 274 "UMask": "0x1" 275 }, 276 { 277 "BriefDescription": "Micro-op reissues for any cause", 278 "Counter": "0,1", 279 "EventCode": "0x3", 280 "EventName": "REISSUE.ANY", 281 "SampleAfterValue": "200000", 282 "UMask": "0x7f" 283 }, 284 { 285 "BriefDescription": "Micro-op reissues for any cause (At Retirement)", 286 "Counter": "0,1", 287 "EventCode": "0x3", 288 "EventName": "REISSUE.ANY.AR", 289 "SampleAfterValue": "200000", 290 "UMask": "0xff" 291 }, 292 { 293 "BriefDescription": "Micro-op reissues on a store-load collision", 294 "Counter": "0,1", 295 "EventCode": "0x3", 296 "EventName": "REISSUE.OVERLAP_STORE", 297 "SampleAfterValue": "200000", 298 "UMask": "0x1" 299 }, 300 { 301 "BriefDescription": "Micro-op reissues on a store-load collision (At Retirement)", 302 "Counter": "0,1", 303 "EventCode": "0x3", 304 "EventName": "REISSUE.OVERLAP_STORE.AR", 305 "SampleAfterValue": "200000", 306 "UMask": "0x81" 307 }, 308 { 309 "BriefDescription": "Cycles issue is stalled due to div busy.", 310 "Counter": "0,1", 311 "EventCode": "0xDC", 312 "EventName": "RESOURCE_STALLS.DIV_BUSY", 313 "SampleAfterValue": "2000000", 314 "UMask": "0x2" 315 }, 316 { 317 "BriefDescription": "All store forwards", 318 "Counter": "0,1", 319 "EventCode": "0x2", 320 "EventName": "STORE_FORWARDS.ANY", 321 "SampleAfterValue": "200000", 322 "UMask": "0x83" 323 }, 324 { 325 "BriefDescription": "Good store forwards", 326 "Counter": "0,1", 327 "EventCode": "0x2", 328 "EventName": "STORE_FORWARDS.GOOD", 329 "SampleAfterValue": "200000", 330 "UMask": "0x81" 331 }, 332 { 333 "BriefDescription": "Micro-ops retired.", 334 "Counter": "0,1", 335 "EventCode": "0xC2", 336 "EventName": "UOPS_RETIRED.ANY", 337 "SampleAfterValue": "2000000", 338 "UMask": "0x10" 339 }, 340 { 341 "BriefDescription": "Cycles no micro-ops retired.", 342 "Counter": "0,1", 343 "EventCode": "0xC2", 344 "EventName": "UOPS_RETIRED.STALLED_CYCLES", 345 "SampleAfterValue": "2000000", 346 "UMask": "0x10" 347 }, 348 { 349 "BriefDescription": "Periods no micro-ops retired.", 350 "Counter": "0,1", 351 "EventCode": "0xC2", 352 "EventName": "UOPS_RETIRED.STALLS", 353 "SampleAfterValue": "2000000", 354 "UMask": "0x10" 355 } 356]