xref: /linux/tools/perf/pmu-events/arch/x86/amdzen6/l3-cache.json (revision c7decec2f2d2ab0366567f9e30c0e1418cece43f) 
1*de18394fSSandipan Das[
2*de18394fSSandipan Das  {
3*de18394fSSandipan Das    "EventName": "l3_lookup_state.l3_miss",
4*de18394fSSandipan Das    "EventCode": "0x04",
5*de18394fSSandipan Das    "BriefDescription": "L3 cache misses.",
6*de18394fSSandipan Das    "UMask": "0x01",
7*de18394fSSandipan Das    "Unit": "L3PMC"
8*de18394fSSandipan Das  },
9*de18394fSSandipan Das  {
10*de18394fSSandipan Das    "EventName": "l3_lookup_state.l3_hit",
11*de18394fSSandipan Das    "EventCode": "0x04",
12*de18394fSSandipan Das    "BriefDescription": "L3 cache hits.",
13*de18394fSSandipan Das    "UMask": "0xfe",
14*de18394fSSandipan Das    "Unit": "L3PMC"
15*de18394fSSandipan Das  },
16*de18394fSSandipan Das  {
17*de18394fSSandipan Das    "EventName": "l3_lookup_state.all_coherent_accesses_to_l3",
18*de18394fSSandipan Das    "EventCode": "0x04",
19*de18394fSSandipan Das    "BriefDescription": "L3 cache requests for all coherent accesses.",
20*de18394fSSandipan Das    "UMask": "0xff",
21*de18394fSSandipan Das    "Unit": "L3PMC"
22*de18394fSSandipan Das  },
23*de18394fSSandipan Das  {
24*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency.dram_near",
25*de18394fSSandipan Das    "EventCode": "0xac",
26*de18394fSSandipan Das    "BriefDescription": "Average sampled latency for L3 requests where data is returned from DRAM in the same NUMA node.",
27*de18394fSSandipan Das    "UMask": "0x01",
28*de18394fSSandipan Das    "EnAllCores": "0x1",
29*de18394fSSandipan Das    "EnAllSlices": "0x1",
30*de18394fSSandipan Das    "SliceId": "0x3",
31*de18394fSSandipan Das    "ThreadMask": "0x3",
32*de18394fSSandipan Das    "Unit": "L3PMC"
33*de18394fSSandipan Das  },
34*de18394fSSandipan Das  {
35*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency.dram_far",
36*de18394fSSandipan Das    "EventCode": "0xac",
37*de18394fSSandipan Das    "BriefDescription": "Average sampled latency for L3 requests where data is returned from DRAM in a different NUMA node.",
38*de18394fSSandipan Das    "UMask": "0x02",
39*de18394fSSandipan Das    "EnAllCores": "0x1",
40*de18394fSSandipan Das    "EnAllSlices": "0x1",
41*de18394fSSandipan Das    "SliceId": "0x3",
42*de18394fSSandipan Das    "ThreadMask": "0x3",
43*de18394fSSandipan Das    "Unit": "L3PMC"
44*de18394fSSandipan Das  },
45*de18394fSSandipan Das  {
46*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency.near_cache",
47*de18394fSSandipan Das    "EventCode": "0xac",
48*de18394fSSandipan Das    "BriefDescription": "Average sampled latency for L3 requests where data is returned from cache of another CCX in the same NUMA node.",
49*de18394fSSandipan Das    "UMask": "0x04",
50*de18394fSSandipan Das    "EnAllCores": "0x1",
51*de18394fSSandipan Das    "EnAllSlices": "0x1",
52*de18394fSSandipan Das    "SliceId": "0x3",
53*de18394fSSandipan Das    "ThreadMask": "0x3",
54*de18394fSSandipan Das    "Unit": "L3PMC"
55*de18394fSSandipan Das  },
56*de18394fSSandipan Das  {
57*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency.far_cache",
58*de18394fSSandipan Das    "EventCode": "0xac",
59*de18394fSSandipan Das    "BriefDescription": "Average sampled latency for L3 requests where data is returned from cache of another CCX in a different NUMA node.",
60*de18394fSSandipan Das    "UMask": "0x08",
61*de18394fSSandipan Das    "EnAllCores": "0x1",
62*de18394fSSandipan Das    "EnAllSlices": "0x1",
63*de18394fSSandipan Das    "SliceId": "0x3",
64*de18394fSSandipan Das    "ThreadMask": "0x3",
65*de18394fSSandipan Das    "Unit": "L3PMC"
66*de18394fSSandipan Das  },
67*de18394fSSandipan Das  {
68*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency.ext_near",
69*de18394fSSandipan Das    "EventCode": "0xac",
70*de18394fSSandipan Das    "BriefDescription": "Average sampled latency for L3 requests where data is returned from extension memory (CXL) in the same NUMA node.",
71*de18394fSSandipan Das    "UMask": "0x10",
72*de18394fSSandipan Das    "EnAllCores": "0x1",
73*de18394fSSandipan Das    "EnAllSlices": "0x1",
74*de18394fSSandipan Das    "SliceId": "0x3",
75*de18394fSSandipan Das    "ThreadMask": "0x3",
76*de18394fSSandipan Das    "Unit": "L3PMC"
77*de18394fSSandipan Das  },
78*de18394fSSandipan Das  {
79*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency.ext_far",
80*de18394fSSandipan Das    "EventCode": "0xac",
81*de18394fSSandipan Das    "BriefDescription": "Average sampled latency for L3 requests where data is returned from extension memory (CXL) in a different NUMA node.",
82*de18394fSSandipan Das    "UMask": "0x20",
83*de18394fSSandipan Das    "EnAllCores": "0x1",
84*de18394fSSandipan Das    "EnAllSlices": "0x1",
85*de18394fSSandipan Das    "SliceId": "0x3",
86*de18394fSSandipan Das    "ThreadMask": "0x3",
87*de18394fSSandipan Das    "Unit": "L3PMC"
88*de18394fSSandipan Das  },
89*de18394fSSandipan Das  {
90*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency.all",
91*de18394fSSandipan Das    "EventCode": "0xac",
92*de18394fSSandipan Das    "BriefDescription": "Average sampled latency for L3 requests where data is returned from all types of sources.",
93*de18394fSSandipan Das    "UMask": "0x3f",
94*de18394fSSandipan Das    "EnAllCores": "0x1",
95*de18394fSSandipan Das    "EnAllSlices": "0x1",
96*de18394fSSandipan Das    "SliceId": "0x3",
97*de18394fSSandipan Das    "ThreadMask": "0x3",
98*de18394fSSandipan Das    "Unit": "L3PMC"
99*de18394fSSandipan Das  },
100*de18394fSSandipan Das  {
101*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency_requests.dram_near",
102*de18394fSSandipan Das    "EventCode": "0xad",
103*de18394fSSandipan Das    "BriefDescription": "Average sampled L3 requests where data is returned from DRAM in the same NUMA node.",
104*de18394fSSandipan Das    "UMask": "0x01",
105*de18394fSSandipan Das    "EnAllCores": "0x1",
106*de18394fSSandipan Das    "EnAllSlices": "0x1",
107*de18394fSSandipan Das    "SliceId": "0x3",
108*de18394fSSandipan Das    "ThreadMask": "0x3",
109*de18394fSSandipan Das    "Unit": "L3PMC"
110*de18394fSSandipan Das  },
111*de18394fSSandipan Das  {
112*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency_requests.dram_far",
113*de18394fSSandipan Das    "EventCode": "0xad",
114*de18394fSSandipan Das    "BriefDescription": "Average sampled L3 requests where data is returned from DRAM in a different NUMA node.",
115*de18394fSSandipan Das    "UMask": "0x02",
116*de18394fSSandipan Das    "EnAllCores": "0x1",
117*de18394fSSandipan Das    "EnAllSlices": "0x1",
118*de18394fSSandipan Das    "SliceId": "0x3",
119*de18394fSSandipan Das    "ThreadMask": "0x3",
120*de18394fSSandipan Das    "Unit": "L3PMC"
121*de18394fSSandipan Das  },
122*de18394fSSandipan Das  {
123*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency_requests.near_cache",
124*de18394fSSandipan Das    "EventCode": "0xad",
125*de18394fSSandipan Das    "BriefDescription": "Average sampled L3 requests where data is returned from cache of another CCX in the same NUMA node.",
126*de18394fSSandipan Das    "UMask": "0x04",
127*de18394fSSandipan Das    "EnAllCores": "0x1",
128*de18394fSSandipan Das    "EnAllSlices": "0x1",
129*de18394fSSandipan Das    "SliceId": "0x3",
130*de18394fSSandipan Das    "ThreadMask": "0x3",
131*de18394fSSandipan Das    "Unit": "L3PMC"
132*de18394fSSandipan Das  },
133*de18394fSSandipan Das  {
134*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency_requests.far_cache",
135*de18394fSSandipan Das    "EventCode": "0xad",
136*de18394fSSandipan Das    "BriefDescription": "Average sampled L3 requests where data is returned from cache of another CCX in a different NUMA node.",
137*de18394fSSandipan Das    "UMask": "0x08",
138*de18394fSSandipan Das    "EnAllCores": "0x1",
139*de18394fSSandipan Das    "EnAllSlices": "0x1",
140*de18394fSSandipan Das    "SliceId": "0x3",
141*de18394fSSandipan Das    "ThreadMask": "0x3",
142*de18394fSSandipan Das    "Unit": "L3PMC"
143*de18394fSSandipan Das  },
144*de18394fSSandipan Das  {
145*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency_requests.ext_near",
146*de18394fSSandipan Das    "EventCode": "0xad",
147*de18394fSSandipan Das    "BriefDescription": "Average sampled L3 requests where data is returned from extension memory (CXL) in the same NUMA node.",
148*de18394fSSandipan Das    "UMask": "0x10",
149*de18394fSSandipan Das    "EnAllCores": "0x1",
150*de18394fSSandipan Das    "EnAllSlices": "0x1",
151*de18394fSSandipan Das    "SliceId": "0x3",
152*de18394fSSandipan Das    "ThreadMask": "0x3",
153*de18394fSSandipan Das    "Unit": "L3PMC"
154*de18394fSSandipan Das  },
155*de18394fSSandipan Das  {
156*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency_requests.ext_far",
157*de18394fSSandipan Das    "EventCode": "0xad",
158*de18394fSSandipan Das    "BriefDescription": "Average sampled L3 requests where data is returned from extension memory (CXL) in a different NUMA node.",
159*de18394fSSandipan Das    "UMask": "0x20",
160*de18394fSSandipan Das    "EnAllCores": "0x1",
161*de18394fSSandipan Das    "EnAllSlices": "0x1",
162*de18394fSSandipan Das    "SliceId": "0x3",
163*de18394fSSandipan Das    "ThreadMask": "0x3",
164*de18394fSSandipan Das    "Unit": "L3PMC"
165*de18394fSSandipan Das  },
166*de18394fSSandipan Das  {
167*de18394fSSandipan Das    "EventName": "l3_xi_sampled_latency_requests.all",
168*de18394fSSandipan Das    "EventCode": "0xad",
169*de18394fSSandipan Das    "BriefDescription": "Average sampled L3 requests where data is returned from all types of sources.",
170*de18394fSSandipan Das    "UMask": "0x3f",
171*de18394fSSandipan Das    "EnAllCores": "0x1",
172*de18394fSSandipan Das    "EnAllSlices": "0x1",
173*de18394fSSandipan Das    "SliceId": "0x3",
174*de18394fSSandipan Das    "ThreadMask": "0x3",
175*de18394fSSandipan Das    "Unit": "L3PMC"
176*de18394fSSandipan Das  }
177*de18394fSSandipan Das]
178