xref: /linux/tools/perf/pmu-events/arch/x86/amdzen5/memory-controller.json (revision 29c73fc794c83505066ee6db893b2a83ac5fac63) 
1[
2  {
3    "EventName": "umc_mem_clk",
4    "PublicDescription": "Number of memory clock (MEMCLK) cycles.",
5    "EventCode": "0x00",
6    "PerPkg": "1",
7    "Unit": "UMCPMC"
8  },
9  {
10    "EventName": "umc_act_cmd.all",
11    "PublicDescription": "Number of ACTIVATE commands sent.",
12    "EventCode": "0x05",
13    "PerPkg": "1",
14    "Unit": "UMCPMC"
15  },
16  {
17    "EventName": "umc_act_cmd.rd",
18    "PublicDescription": "Number of ACTIVATE commands sent for reads.",
19    "EventCode": "0x05",
20    "RdWrMask": "0x1",
21    "PerPkg": "1",
22    "Unit": "UMCPMC"
23  },
24  {
25    "EventName": "umc_act_cmd.wr",
26    "PublicDescription": "Number of ACTIVATE commands sent for writes.",
27    "EventCode": "0x05",
28    "RdWrMask": "0x2",
29    "PerPkg": "1",
30    "Unit": "UMCPMC"
31  },
32  {
33    "EventName": "umc_pchg_cmd.all",
34    "PublicDescription": "Number of PRECHARGE commands sent.",
35    "EventCode": "0x06",
36    "PerPkg": "1",
37    "Unit": "UMCPMC"
38  },
39  {
40    "EventName": "umc_pchg_cmd.rd",
41    "PublicDescription": "Number of PRECHARGE commands sent for reads.",
42    "EventCode": "0x06",
43    "RdWrMask": "0x1",
44    "PerPkg": "1",
45    "Unit": "UMCPMC"
46  },
47  {
48    "EventName": "umc_pchg_cmd.wr",
49    "PublicDescription": "Number of PRECHARGE commands sent for writes.",
50    "EventCode": "0x06",
51    "RdWrMask": "0x2",
52    "PerPkg": "1",
53    "Unit": "UMCPMC"
54  },
55  {
56    "EventName": "umc_cas_cmd.all",
57    "PublicDescription": "Number of CAS commands sent.",
58    "EventCode": "0x0a",
59    "PerPkg": "1",
60    "Unit": "UMCPMC"
61  },
62  {
63    "EventName": "umc_cas_cmd.rd",
64    "PublicDescription": "Number of CAS commands sent for reads.",
65    "EventCode": "0x0a",
66    "RdWrMask": "0x1",
67    "PerPkg": "1",
68    "Unit": "UMCPMC"
69  },
70  {
71    "EventName": "umc_cas_cmd.wr",
72    "PublicDescription": "Number of CAS commands sent for writes.",
73    "EventCode": "0x0a",
74    "RdWrMask": "0x2",
75    "PerPkg": "1",
76    "Unit": "UMCPMC"
77  },
78  {
79    "EventName": "umc_data_slot_clks.all",
80    "PublicDescription": "Number of clock cycles used by the data bus.",
81    "EventCode": "0x14",
82    "PerPkg": "1",
83    "Unit": "UMCPMC"
84  },
85  {
86    "EventName": "umc_data_slot_clks.rd",
87    "PublicDescription": "Number of clock cycles used by the data bus for reads.",
88    "EventCode": "0x14",
89    "RdWrMask": "0x1",
90    "PerPkg": "1",
91    "Unit": "UMCPMC"
92  },
93  {
94    "EventName": "umc_data_slot_clks.wr",
95    "PublicDescription": "Number of clock cycles used by the data bus for writes.",
96    "EventCode": "0x14",
97    "RdWrMask": "0x2",
98    "PerPkg": "1",
99    "Unit": "UMCPMC"
100  }
101]
102