xref: /linux/tools/perf/pmu-events/arch/riscv/thead/c900-legacy/microarch.json (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1[
2  {
3    "EventName": "LSU_SPEC_FAIL",
4    "EventCode": "0x0000000a",
5    "BriefDescription": "LSU speculation fail"
6  },
7  {
8    "EventName": "IDU_RF_PIPE_FAIL",
9    "EventCode": "0x00000014",
10    "BriefDescription": "Instruction decode unit launch pipeline failed in RF state"
11  },
12  {
13    "EventName": "IDU_RF_REG_FAIL",
14    "EventCode": "0x00000015",
15    "BriefDescription": "Instruction decode unit launch register file fail in RF state"
16  },
17  {
18    "EventName": "IDU_RF_INSTRUCTION",
19    "EventCode": "0x00000016",
20    "BriefDescription": "retired instruction count of Instruction decode unit in RF (Register File) stage"
21  },
22  {
23    "EventName": "LSU_4K_STALL",
24    "EventCode": "0x00000017",
25    "BriefDescription": "LSU stall times for long distance data access (Over 4K)",
26    "PublicDescription": "This stall occurs when translate virtual address with page offset over 4k"
27  },
28  {
29    "EventName": "LSU_OTHER_STALL",
30    "EventCode": "0x00000018",
31    "BriefDescription": "LSU stall times for other reasons (except the 4k stall)"
32  },
33  {
34    "EventName": "LSU_SQ_OTHER_DIS",
35    "EventCode": "0x00000019",
36    "BriefDescription": "LSU store queue discard others"
37  },
38  {
39    "EventName": "LSU_SQ_DATA_DISCARD",
40    "EventCode": "0x0000001a",
41    "BriefDescription": "LSU store queue discard data (uops)"
42  },
43  {
44    "EventName": "BRANCH_DIRECTION_MISPREDICTION",
45    "EventCode": "0x0000001b",
46    "BriefDescription": "Branch misprediction in BTB"
47  },
48  {
49    "EventName": "BRANCH_DIRECTION_PREDICTION",
50    "EventCode": "0x0000001c",
51    "BriefDescription": "All branch prediction in BTB",
52    "PublicDescription": "This event including both successful prediction and failed prediction in BTB"
53  },
54  {
55    "EventName": "INTERRUPT_ACK_COUNT",
56    "EventCode": "0x00000023",
57    "BriefDescription": "acknowledged interrupt count"
58  },
59  {
60    "EventName": "INTERRUPT_OFF_CYCLE",
61    "EventCode": "0x00000024",
62    "BriefDescription": "PLIC arbitration time when the interrupt is not responded",
63    "PublicDescription": "The arbitration time is recorded while meeting any of the following:\n- CPU is M-mode and MIE == 0\n- CPU is S-mode and delegation and SIE == 0\n"
64  },
65  {
66    "EventName": "IFU_STALLED_CYCLE",
67    "EventCode": "0x00000027",
68    "BriefDescription": "Number of stall cycles of the instruction fetch unit (IFU)."
69  },
70  {
71    "EventName": "IDU_STALLED_CYCLE",
72    "EventCode": "0x00000028",
73    "BriefDescription": "hpcp_backend_stall Number of stall cycles of the instruction decoding unit (IDU) and next-level pipeline unit."
74  },
75  {
76    "EventName": "SYNC_STALL",
77    "EventCode": "0x00000029",
78    "BriefDescription": "Sync instruction stall cycle fence/fence.i/sync/sfence"
79  }
80]
81