xref: /linux/tools/perf/pmu-events/arch/riscv/sifive/u74/microarch.json (revision 0526b56cbc3c489642bd6a5fe4b718dea7ef0ee8) 
1[
2  {
3    "EventName": "ADDRESSGEN_INTERLOCK",
4    "EventCode": "0x0000101",
5    "BriefDescription": "Address-generation interlock"
6  },
7  {
8    "EventName": "LONGLAT_INTERLOCK",
9    "EventCode": "0x0000201",
10    "BriefDescription": "Long-latency interlock"
11  },
12  {
13    "EventName": "CSR_READ_INTERLOCK",
14    "EventCode": "0x0000401",
15    "BriefDescription": "CSR read interlock"
16  },
17  {
18    "EventName": "ICACHE_ITIM_BUSY",
19    "EventCode": "0x0000801",
20    "BriefDescription": "Instruction cache/ITIM busy"
21  },
22  {
23    "EventName": "DCACHE_DTIM_BUSY",
24    "EventCode": "0x0001001",
25    "BriefDescription": "Data cache/DTIM busy"
26  },
27  {
28    "EventName": "BRANCH_DIRECTION_MISPREDICTION",
29    "EventCode": "0x0002001",
30    "BriefDescription": "Branch direction misprediction"
31  },
32  {
33    "EventName": "BRANCH_TARGET_MISPREDICTION",
34    "EventCode": "0x0004001",
35    "BriefDescription": "Branch/jump target misprediction"
36  },
37  {
38    "EventName": "PIPE_FLUSH_CSR_WRITE",
39    "EventCode": "0x0008001",
40    "BriefDescription": "Pipeline flush from CSR write"
41  },
42  {
43    "EventName": "PIPE_FLUSH_OTHER_EVENT",
44    "EventCode": "0x0010001",
45    "BriefDescription": "Pipeline flush from other event"
46  },
47  {
48    "EventName": "INTEGER_MULTIPLICATION_INTERLOCK",
49    "EventCode": "0x0020001",
50    "BriefDescription": "Integer multiplication interlock"
51  },
52  {
53    "EventName": "FP_INTERLOCK",
54    "EventCode": "0x0040001",
55    "BriefDescription": "Floating-point interlock"
56  }
57]